In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol converters. Existing approaches to automatic synthesis of protocol converters mostly lack formal foundations and either employ abstractions that ignore crucial low level behaviors, or grossly simplify the structure of the protocols considered. We present a state-machine based formal model for bus based communication protocols, and precisely define protocol compatibility, and correct protocol conversion. Our model is expressive enough to capture features of commercial protocols such as bursts, pipelined transfers, wait state insertion, and data persistence, in cycle accurate detail. We show tha...
We address the problem of protocol converter synthesis, i.e., the automatic design of automata to t...
Protocol conversion problem involves identifying whether two or more protocols can be com-posed with...
Plug-n-play-style intellectual property reuse in system-on-chip design is facilitated by the use of ...
In the absence of a single module interface standard, integration of pre-designed modules in System-...
Hardware module reuse is a standard solution to the problems of increasing complexity of chip archit...
The field of chip design is characterized by contradictory pressures to reduce time-to-market and ma...
Reuse of IP blocks is an important design philosophy for embedded systems. This allows shorter desig...
AbstractSystem-on-chip verification is an active research area. Of particular interest is protocol c...
Modern computer systems rely more and more on on-chip communication protocols to exchange data. To m...
Protocol conversion for mismatched protocols has been addressed in a number of formal and informal s...
Modern computer systems rely more and more on on-chip communication protocols to exchange data. To m...
A protocol mismatch occurs when heterogeneous networks try to communicate with each other. Such mism...
The gateways that connect networks must deal with heterogeneity in the protocols they support. One a...
We address the problem of the automatic design of automata to translatebetween different protocols, ...
Protocol conversion deals with the automatic synthesis of an additional component, often referred to...
We address the problem of protocol converter synthesis, i.e., the automatic design of automata to t...
Protocol conversion problem involves identifying whether two or more protocols can be com-posed with...
Plug-n-play-style intellectual property reuse in system-on-chip design is facilitated by the use of ...
In the absence of a single module interface standard, integration of pre-designed modules in System-...
Hardware module reuse is a standard solution to the problems of increasing complexity of chip archit...
The field of chip design is characterized by contradictory pressures to reduce time-to-market and ma...
Reuse of IP blocks is an important design philosophy for embedded systems. This allows shorter desig...
AbstractSystem-on-chip verification is an active research area. Of particular interest is protocol c...
Modern computer systems rely more and more on on-chip communication protocols to exchange data. To m...
Protocol conversion for mismatched protocols has been addressed in a number of formal and informal s...
Modern computer systems rely more and more on on-chip communication protocols to exchange data. To m...
A protocol mismatch occurs when heterogeneous networks try to communicate with each other. Such mism...
The gateways that connect networks must deal with heterogeneity in the protocols they support. One a...
We address the problem of the automatic design of automata to translatebetween different protocols, ...
Protocol conversion deals with the automatic synthesis of an additional component, often referred to...
We address the problem of protocol converter synthesis, i.e., the automatic design of automata to t...
Protocol conversion problem involves identifying whether two or more protocols can be com-posed with...
Plug-n-play-style intellectual property reuse in system-on-chip design is facilitated by the use of ...