Add to ORKGSub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power electronics. The implementation of gain-cell embedded DRAMs (eDRAMs) based on FinFET devices requires a careful design to achieve the maximum cell performance (i.e., retention time, access time, and energy consumption) suitable for the sub-V T operating level. In this work, we show that asymmetrically resizing the memory cell (i.e., the channel length of the write access transistor and the width of the rest of the devices) results in a 3.5× increase in retention time when compared to the nominal case while reducing area, as well. In terms of reliability (e.g., variability and soft errors), the resizing also improves the cell robustness (50% and 1...
Two new six-FinFET memory circuits with asymmetrically gate underlapped bitline access transistors a...
Logic compatible gain cell (GC) embedded DRAM (eDRAM) arrays are considered an alternative to SRAM d...
Capacitorless dynamic random access memory (DRAM) is a promising solution to cell-area scalability a...
Sub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power elec...
This paper explores the feasibility, in terms of performance and reliability, of gain-cell embedded ...
With the advent of the slowdown in DRAM capacitor scaling [1] and the increased reliability problems...
Leakage currents in CMOS transistors have risen dramatically with technology scaling leading to sign...
Data stability of Static Random Access Memory (SRAM) circuits has become an important issue with the...
In this paper, a new 11T SRAM cell using FinFET technology has been proposed, the basic component of...
Gain-cell-based embedded dynamic random-access memory (DRAMs) are a potential high-density alternati...
Degraded data stability, weaker write ability, and increased leakage power consumption are the prima...
Bio-medical wearable devices restricted to their small-capacity embedded-battery require energy-effi...
Due to the scaling of the CMOS, the limitations of these devices raised the need for alternative nan...
We summarize most of our studies focused on the main reliability issues that can threat the gain-cel...
The development of the nanotechnology leadsto the shrinking of the size of the transistors to nanome...
Two new six-FinFET memory circuits with asymmetrically gate underlapped bitline access transistors a...
Logic compatible gain cell (GC) embedded DRAM (eDRAM) arrays are considered an alternative to SRAM d...
Capacitorless dynamic random access memory (DRAM) is a promising solution to cell-area scalability a...
Sub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power elec...
This paper explores the feasibility, in terms of performance and reliability, of gain-cell embedded ...
With the advent of the slowdown in DRAM capacitor scaling [1] and the increased reliability problems...
Leakage currents in CMOS transistors have risen dramatically with technology scaling leading to sign...
Data stability of Static Random Access Memory (SRAM) circuits has become an important issue with the...
In this paper, a new 11T SRAM cell using FinFET technology has been proposed, the basic component of...
Gain-cell-based embedded dynamic random-access memory (DRAMs) are a potential high-density alternati...
Degraded data stability, weaker write ability, and increased leakage power consumption are the prima...
Bio-medical wearable devices restricted to their small-capacity embedded-battery require energy-effi...
Due to the scaling of the CMOS, the limitations of these devices raised the need for alternative nan...
We summarize most of our studies focused on the main reliability issues that can threat the gain-cel...
The development of the nanotechnology leadsto the shrinking of the size of the transistors to nanome...
Two new six-FinFET memory circuits with asymmetrically gate underlapped bitline access transistors a...
Logic compatible gain cell (GC) embedded DRAM (eDRAM) arrays are considered an alternative to SRAM d...
Capacitorless dynamic random access memory (DRAM) is a promising solution to cell-area scalability a...