Synchronous elastic circuits with early evaluation and token counterflow

A protocol for latency-insensitive design with early evaluation and its implementation is presented. The implementation is based on a symmetric view of the system in which tokens carrying information move in the forward direction and anti-tokens canceling information move in the backward direction. When tokens and anti-tokens collide, they annihilate. The implementation is formally verified against the temporal properties of the elastic protocol and correct transfer of data. An example illustrates the flow for converting a regular synchronous design into the elastic form and demonstrates trade-offs in applying early evaluation and token counterflow