An FPGA based embedded vision system for real-time motion detection

This paper proposes an efficient FPGA (Field Programmable Gate Array) based real time video processing platform for monocular object detection. Algorithms that depend on the background subtraction techniques were proposed on FPGA. Due to its paramount importance for background subtraction algorithms to disregard unimportant movements such as camera jitter and tree branches, a multi model sigma delta algorithm was used. Furthermore, a Gaussian pyramid was utilized in the preprocessing state to reduce the frame size so as to reduce memory and time complexity. This results in a Gaussian Pyramid down sampling multi model sigma delta algorithm that gives low false detection error and good performance. The proposed algorithm was implemented on the FPGA with a 25 MHz crystal. The frame rate was found to be 190 frames per second. The system was able to process 10 pixels at one clock cycle to detect object by using only 643 logic blocks