높은 구동 전류와 낮은 문턱전압 이하 스윙을 가지는 L자 형태의 터널링 전계효과 트랜지스터

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2014. 2. 박병국.In order to solve power crisis in highly-scaled CMOS technology, a novel tunnel field-effect transistors (TFETs), named L-shaped TFETs, have been proposed and its electrical properties are examined. It features band-to-band tunneling (BTBT) direction parallel to the normal electric field induced by gate electrode. Because carrier injection is occurred perpendicular to the channel direction, cross-sectional area and barrier width of BTBT junction could be defined by structural parameters. Using the commercial TCAD device simulator, its electrical characteristics are examined and optimized. It is expected that the L-shaped TFETs will reveal better performance than conventional ones in terms of subthreshold swing (S), on-current (Ion) and short channel effect. In addition, the performance of L-shaped TFET inverters has been compared with that of conventional TFET ones for its complementary logic application. After the key process techniques are obtained, control and comparison samples are fabricated at Inter-University Semiconductor Research Center (ISRC) of Seoul National University (SNU), Korea. The main process technique is as follow: in-situ doped epitaxial layer growth for constantly doped source region, selective epitaxial layer growth of silicon at low temperature for tunneling region, and guarantee sub-3-nm gate dielectric. From the electrical measurement of transfer and output characteristics, it is verified that 102 mV/dec minimum S in conventional TFET is improve to 7, 34 and 59 mV/dec in L-shaped TFET. In addition, the Ion of L-shaped TFET is more than 10 times larger than that of conventional one. Extracting several parameters such as source/drain resistance, channel resistance, mobility, and tunneling resistance, it is clear that the improved performance comes from the reduction of tunneling resistance. From this study, it is demonstrated that L-shaped TFET will be one of the most promising candidate for a next-generation low-power device.Abstract i Contents iii List of Tables v List of Figures vi Chapter 1 Introduction 1 1.1 NECESSITY OF ALTERNATIVES TO CMOS 1 1.2 TUNNEL FIELD-EFFECT TRANSISTORS (TFETS) 4 1.3 TECHNICAL ISSUES OF TFETS 7 1.4 SCOPE OF THESIS 10 Chapter 2 L-shaped TFET 11 2.1 FEATURES OF L-SHAPED TFET 11 2.2 DESIGN OPTIMIZATION 17 2.3 CORNER EFFECT 27 2.4 FURTHER IMPROVEMENT AND CIRCUIT APPLICATION 36 2.5 SUMMARY OF TARGET DEVICE 40 Chapter 3 Device Fabrication 42 3.1 FABRICATION OF CONTROL TFETS 42 3.2 KEY PROCESS DESIGNS FOR L-SHAPED TFETS 45 3.3 FABRICATION OF L-SHAPED TFET 51 3.4 SIDEWALL SPACER FOR MINIMIZATION OF MIS-ALIGNMENT 56 Chapter 4 Device Characteristics 59 4.1 METAL-OXIDE-SEMICONDUCTOR (MOS) CAPACITOR 59 4.2 CONTROL SAMPLES OF CONVENTIONAL PLANAR TFETS 63 4.3 L-SHAPED TFETS 71 4.4 EXTRACTION OF SEVERAL ELECTRICAL PARAMETERS 76 Chapter 5 80 Conclusions 80 Bibliography 82 Abstract in Korean 89 Curriculum Vitae 91Docto