Modulation schemes for the audio beam system : fixed-point analysis, simulation and implementation

Directional sound finds application in many areas such as entertainment, gaming, communication, and personal messaging. Directional sound can be created by modulating an audible signal onto an ultrasonic carrier and projecting the modulated signal via special types of ultrasonic transducer to generate the parametric array through air, in such a way that audible sound can travel in a column of sound beams. The device that generates this phenomenon is generally referred to as the parametric loudspeaker. Parametric loudspeaker uses several proprietary modulation schemes to generate audible sound with lesser distortion. These modulation schemes constitute the major signal processing tasks in the parametric loudspeaker system. Due to several advantages, such as size, speed, flexibility, accuracy, and ease of programming, digital implementation of the modulation schemes is preferred over analog approach. Fixed-point programmable digital signal processing (DSP) processor is a common embedded processor used in many low power and cost-efficient consumer electronic designs. Compared to floating-point DSP processors, fixed-point DSP processors are low cost, high speed, and power-efficient processors, but with lower precision and signal-to-quantization-noise ratio (SQNR). SQNR is the most commonly used criterion for evaluating the system accuracy in the digital domain. As we are interested in the real-time implementation of the modulation schemes used in parametric loudspeaker, we have the dual objectives of maximizing the SQNR and minimizing the computational workload of modulation schemes. For each modulation scheme, there exist several algorithms. Therefore, careful analysis on each algorithm can help in achieving the dual objectives. In addition, new algorithms and implementation techniques are devised to further achieve a more efficient real-time implementation. For each modulation scheme, the algorithm with maximum SQNR and minimum computational workload is selected for real-time implementation. Real-time profiling of the selected algorithms is carried out on a 16-bit fixed-point DSP processor in terms of their processing MIPS, memory usage and accuracies.DOCTOR OF PHILOSOPHY (EEE