This report presents state-of-the-art In-memory Computing (IMC) works using SRAM. A brief introduction of static random access memory (SRAM) operation will be explained by introducing an intuitive method to analyze the circuits. Several state-of-the-art ultra-low-power (ULP) SRAM design techniques and IMC works will be discussed. A simple SRAM circuit simulation is carried out using Cadence and the circuit works correctly as expected. Compared to other FYP works, this report aims to analyze research papers from top circuit conferences such as International Solid-State Circuit Conference (ISSCC) and journals such as IEEE Journal of Solid-State Circuits (JSSC).Bachelor of Engineering (Electrical and Electronic Engineering
In recent years, CMOS-based conventional memory technologies including SRAM, DRAM, and Flash memori...
The semiconductor memory SRAM uses bi-stable latch circuit to store the logic data 1 or 0. It differ...
Static Random Access Memory (SRAM)- based cache is one of the most important components of state-of-...
This paper deals with the design and analysis of high speed Static Random Access Memory (SRAM) cell ...
International audience—This paper presents the computing model for In-Memory Computing architecture ...
Memory arrays are an essential building block in any digital system. SRAM is a device that has infil...
As the development of microelectronics technology, the design of memory cell has already become an i...
Considering the possibility of calculating multiplication and addition of values stored in memory no...
The objective of the research was to design and test an SRAM system which can meet the performance c...
This project presents the design of a 1kbyte synchronous Static Random Access Memory (SRAM). The SRA...
In this paper an effort is made to design 16 bit SRAM memory array on 180nm technology. For high-spe...
The well-known Moore's Law is about to end after CMOS devices using 7nm process technology are widel...
Digital computation has penetrated diversity of applications such as audio visual communication, bio...
In-memory computing is the storage of information in the main random access memory (RAM) of servers ...
This thesis presents a full methodology of a Static Random Access Memory (SRAM) and steps to develop...
In recent years, CMOS-based conventional memory technologies including SRAM, DRAM, and Flash memori...
The semiconductor memory SRAM uses bi-stable latch circuit to store the logic data 1 or 0. It differ...
Static Random Access Memory (SRAM)- based cache is one of the most important components of state-of-...
This paper deals with the design and analysis of high speed Static Random Access Memory (SRAM) cell ...
International audience—This paper presents the computing model for In-Memory Computing architecture ...
Memory arrays are an essential building block in any digital system. SRAM is a device that has infil...
As the development of microelectronics technology, the design of memory cell has already become an i...
Considering the possibility of calculating multiplication and addition of values stored in memory no...
The objective of the research was to design and test an SRAM system which can meet the performance c...
This project presents the design of a 1kbyte synchronous Static Random Access Memory (SRAM). The SRA...
In this paper an effort is made to design 16 bit SRAM memory array on 180nm technology. For high-spe...
The well-known Moore's Law is about to end after CMOS devices using 7nm process technology are widel...
Digital computation has penetrated diversity of applications such as audio visual communication, bio...
In-memory computing is the storage of information in the main random access memory (RAM) of servers ...
This thesis presents a full methodology of a Static Random Access Memory (SRAM) and steps to develop...
In recent years, CMOS-based conventional memory technologies including SRAM, DRAM, and Flash memori...
The semiconductor memory SRAM uses bi-stable latch circuit to store the logic data 1 or 0. It differ...
Static Random Access Memory (SRAM)- based cache is one of the most important components of state-of-...