ATM switching architecture for broadband-ISDN and its performance

Owing to the unscheduled nature of cell arrivals to an ATM switch, two or more cells may arrive at different input ports in one time slot and be destined to the same output port. The ATM switch may allow one or more of these cells to pass through simultaneously to reach the output ports while the other cells may have to be queued for later slots or have to be discarded, depending on the buffering schemes. In this project, a model to represent the cell traffic at the input ports as well as a cell selection policy is chosen. A simple ATM switch architecture is proposed, and its performance is simulated and analyzed in terms of utilization, throughput, cell loss probability, and cell delay versus buffer and switch sizes.Master of Science (Communication and Network Systems