Design of an analog buffer

An Operational Amplifier (Op-Amp) with driving capability to source and sink current designed with low Total Harmonic Distortion will be demonstrated in this paper. The Op-Amp will be utilized as an analog buffer to provide analog ground with source and sink capabilities. The circuit was designed and implemented using the 0.18μm CMOS technology process. The analysis of the Op-Amp is completed using Cadence EDA tools for simulations. The Op-Amp consists of a Single-Stage Amplifier which uses a Nested-Current-Mirror amplifier and a Class AB output stage which uses a rail-to-rail output stage with common-gate shifter. The proposed Op-Amp can operate at supply voltage of 1.2V. The specifications implemented for the Op-Amp has a 60 degrees phase margin, Gain Bandwidth of 1MHz, open-loop gain of about 80dB, with an input-referred noise of about 500nV/sqrt Hz at 1kHz. The Op-Amp has the capability to drive capacitive load of 150pF and resistive loads with current up to 100mA. Low Total Harmonic Distortion is achieved under 0.1%. Details of implementation and findings will be presented in this project.Bachelor of Engineerin