FGPA implementation of double-error detection & correction circuit in redundant residue number system

Among the digit error detection and correction methods developed in recent year, algorithm based on Residue Number System (RRNS) shows huge advantages. It is not only able to deal with errors due to noise and failure inherits from manufacturing defects but also arithmetic errors. However existing algorithm in RRNS either need complex computation to identify the location of erroneous residue digits or large number of modulo operation to compute error magnitude from it. This project is based on a new non-iteration algorithm proposed in[1] which use three syndromes to identify the erroneous location and decode error magnitude from look up table with much less computations. This report discusses a possible implementation based on [1] which is able to detect and correct double erroneous residue digits in one time. The whole implementation consists three parts: 1) Error Location Determination; 2) Syndrome Generation; 3) Error Magnitude Retrieving. Received residue digits will be sent to error location determination part and dived into three sections. Hence total seven location categories are formed, and each category has its corresponding syndrome values. In syndrome generation part, the system will generate syndrome from input residue digits and moduli set. Generated syndrome value will then be used for retrieving error magnitude by checking look up tables (LUTs). The last two parts are the core functions that can be realized with help of modulo adders and modulo multipliers. Special moduli set modulo operators are implemented for information signal, whereas redundant information signal is processed by arbitrary modulo operators.Bachelor of Engineering (Electrical and Electronic Engineering