This paper presents a non-binary passive charge sharing SAR ADC and an optimization method for non-binary successive approximation algorithm. The passive charge sharing ADC is designed. The optimization method suggests that the non-binary SAR ADC with lower standard deviation DAC capacitance values will show better static performance. The SAR ADCs with different standard deviation value of DAC capacitor array are designed and simulated using a commercial 65nm CMOS technology. The simulation result shows that the static performance improvement trend is in accordance with the proposed optimization method. In addition, the optimized non-binary charge sharing SAR ADC shows better performance than conventional binary SAR ADC
In this paper, the design of a 6-bits successive approximation register (SAR) analog to digital conv...
Reference drivers for charge-redistribution SAR ADCs require significant area and/or power. In this ...
ABSTRACT Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs) achieve low po...
This paper presents a non-binary passive charge sharing SAR ADC and an optimization method for non-b...
For implantable medical devices like artificial pacemakers, high power efficiency is demanded becaus...
A new architecture for successive-approximation register analog-to-digital converters (SAR ADC) usin...
Analysis and experimental results for a new switching scheme and topology for charge sharing DACs us...
Nowadays, the development of the IC technology resulted in a growth of digital systems. Thus, Analog...
Abstract—This paper describes techniques for creating a low-power SAR ADC with an error-correcting n...
Abstract—Analysis and experimental results for a new switching scheme and topology for charge sharin...
The conventional binary weighted array SAR ADC is the common topology adopted to achieve high effici...
This paper presents a new method for switching the capacitors in the DAC capacitor array of a succes...
This paper presents a 9-bit differential, minimum-powered, successive approximation register (SAR) A...
In this work a low power SAR ADC with 8.9 ENOB for wireless communication systems is presented. A ca...
This paper presents a 12-bit, 100 MS/s successive approximation register (SAR) analog-to-digital con...
In this paper, the design of a 6-bits successive approximation register (SAR) analog to digital conv...
Reference drivers for charge-redistribution SAR ADCs require significant area and/or power. In this ...
ABSTRACT Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs) achieve low po...
This paper presents a non-binary passive charge sharing SAR ADC and an optimization method for non-b...
For implantable medical devices like artificial pacemakers, high power efficiency is demanded becaus...
A new architecture for successive-approximation register analog-to-digital converters (SAR ADC) usin...
Analysis and experimental results for a new switching scheme and topology for charge sharing DACs us...
Nowadays, the development of the IC technology resulted in a growth of digital systems. Thus, Analog...
Abstract—This paper describes techniques for creating a low-power SAR ADC with an error-correcting n...
Abstract—Analysis and experimental results for a new switching scheme and topology for charge sharin...
The conventional binary weighted array SAR ADC is the common topology adopted to achieve high effici...
This paper presents a new method for switching the capacitors in the DAC capacitor array of a succes...
This paper presents a 9-bit differential, minimum-powered, successive approximation register (SAR) A...
In this work a low power SAR ADC with 8.9 ENOB for wireless communication systems is presented. A ca...
This paper presents a 12-bit, 100 MS/s successive approximation register (SAR) analog-to-digital con...
In this paper, the design of a 6-bits successive approximation register (SAR) analog to digital conv...
Reference drivers for charge-redistribution SAR ADCs require significant area and/or power. In this ...
ABSTRACT Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs) achieve low po...