The SU(2)-Lattice Gauge Theory simulation code on the Intel Paragon supercomputer

We describe the steps which lead to a speed efficiency of about 48% for a code for the simulation of pure SU(2) Lattice Gauge Theory on the Intel Paragon XP/S Supercomputer. Here the efficiency is defined by the ratio of sustained MFLOPS performance over the peak performance. The maximal size of the lattice is 80 × 483, and up to 135 compute nodes have been used. We analyze several kernels, written partly in assembler language, and we describe the communication strategy both for the updating process and for the measurement. Exclusive use of FORTRAN language leads to a performance reduction of a factor 2.4 as compared to the assembler case