Recent years have seen the development of several different systems for software transactional memory (STM). Most either employ locks in the underlying implementation or depend on thread-safe general-purpose garbage collection to collect stale data and metadata. We consider the design of low-overhead, obstruction-free software transactional memory for non-garbage-collected languages. Our design eliminates dynamic allocation of transactional metadata and co-locates data that are separate in other systems, thereby reducing the expected number of cache misses on the common-case code path, while preserving nonblocking progress and requiring no atomic instructions other than single-word load, store, and compare-and-swap (or load-linked/store-...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2008.The computing industry is ...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performanc...
The advent of multicore processors has put the performance of traditional parallel programming techn...
Recent years have seen the development of several different systems for software transactional memor...
The current state of the art seems to favour blocking software transactional memory (STM) implement...
We propose a new form of software transactional memory (STM) designed to support dynamic-sized data ...
We propose a new form of software transactional memory (STM) designed to support dynamic-sized data ...
Substantial advances in STM performance in recent years have mostly focused on blocking systems. We ...
The aim of a software transactional memory (STM) system is to facilitate the design of concurrent pr...
With the advent of chip-multiprocessors, we are faced with the challenge of paral-lelizing performan...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
Transactional memory (TM) promises to simplify concurrent pro-gramming while providing scalability c...
Abstract. Much previous work on Software Transactional Memory has gone to great lengths to be “obstr...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
Abstract. The imminent arrival of best-effort transactional hardware has spurred new interest in the...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2008.The computing industry is ...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performanc...
The advent of multicore processors has put the performance of traditional parallel programming techn...
Recent years have seen the development of several different systems for software transactional memor...
The current state of the art seems to favour blocking software transactional memory (STM) implement...
We propose a new form of software transactional memory (STM) designed to support dynamic-sized data ...
We propose a new form of software transactional memory (STM) designed to support dynamic-sized data ...
Substantial advances in STM performance in recent years have mostly focused on blocking systems. We ...
The aim of a software transactional memory (STM) system is to facilitate the design of concurrent pr...
With the advent of chip-multiprocessors, we are faced with the challenge of paral-lelizing performan...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
Transactional memory (TM) promises to simplify concurrent pro-gramming while providing scalability c...
Abstract. Much previous work on Software Transactional Memory has gone to great lengths to be “obstr...
A shared data structure is lock-free if its operations do not require mutual exclusion. If one proce...
Abstract. The imminent arrival of best-effort transactional hardware has spurred new interest in the...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2008.The computing industry is ...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performanc...
The advent of multicore processors has put the performance of traditional parallel programming techn...