We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin glasses, theoretical models for the behavior of glassy materials. FPGAs (as compared to GPUs or many-core processors) provide a complementary approach to massively parallel computing. In particular, our model problem is formulated in terms of binary variables, and floating-point operations can be (almost) completely avoided. The FPGA architecture allows us to run many independent threads with almost no latencies in memory access, thus updating up to 1024 spins per cycle. We describe Janus in detail and we summarize the physics results obtained in four years of operation of this machine; we discuss two types of physics applications: long simulati...
Janus is an FPGA-based computer optimized for the simulation of spin glasses or similar condensed ma...
This paper describes the architecture, the development and the implementation of Janus II, a new gen...
This paper describes the architecture and FPGA-based implementation of a massively parallel processi...
We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin gla...
We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin gla...
We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin gla...
In this chapter we describe the Janus supercomputer, a massively parallel FPGA-based system optimize...
In this chapter we describe the Janus supercomputer, a massively parallel FPGA-based system optimize...
We describe Janus, an application-driven architecture for Monte Carlo simulations of spin glasses. J...
We describe the past and future of the Janus project. The collaboration started in 2006 and deployed...
We describe the past and future of the Janus project. The collaboration started in 2006 and deployed...
Spin-glasses have become one of the most computing-demanding problems of the last 50 years in Statis...
We describe Janus, an application-driven architecture for Monte Carlo simulations of spin glasses. J...
This paper describes JANUS, a modular massively parallel and reconfigurable FPGA-based computing sys...
Summary. — Janus is an FPGA-based computer optimized for the simulation of spin glasses or similar c...
Janus is an FPGA-based computer optimized for the simulation of spin glasses or similar condensed ma...
This paper describes the architecture, the development and the implementation of Janus II, a new gen...
This paper describes the architecture and FPGA-based implementation of a massively parallel processi...
We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin gla...
We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin gla...
We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin gla...
In this chapter we describe the Janus supercomputer, a massively parallel FPGA-based system optimize...
In this chapter we describe the Janus supercomputer, a massively parallel FPGA-based system optimize...
We describe Janus, an application-driven architecture for Monte Carlo simulations of spin glasses. J...
We describe the past and future of the Janus project. The collaboration started in 2006 and deployed...
We describe the past and future of the Janus project. The collaboration started in 2006 and deployed...
Spin-glasses have become one of the most computing-demanding problems of the last 50 years in Statis...
We describe Janus, an application-driven architecture for Monte Carlo simulations of spin glasses. J...
This paper describes JANUS, a modular massively parallel and reconfigurable FPGA-based computing sys...
Summary. — Janus is an FPGA-based computer optimized for the simulation of spin glasses or similar c...
Janus is an FPGA-based computer optimized for the simulation of spin glasses or similar condensed ma...
This paper describes the architecture, the development and the implementation of Janus II, a new gen...
This paper describes the architecture and FPGA-based implementation of a massively parallel processi...