Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Many-core systems are a common place in the electronic consumer market. Thus, complex benchmark suites have been modeled for shared memory (SM) architectures since it is easier to develop applications (threads) for many-core. Shared memory presents a scalability limitation due to the number of memory accesses. One way to mitigate the SM limitations is to adopt distributed memory system (DSM) architectures. However, DSM presents the same scalability limitation, since the number of processors is clearly superior to the number of SMs in the system. The alternative is to adopt distributed memory organization (DM), which enables the direct communication among the tasks (message ...
This paper studies realization and performance comparison of the sequential and weak consistency mod...
Distributed shared-memory systems provide scalable performance and a convenient model for parallel p...
Abstract—Current processor design with ever more cores may ensure that theoretical compute performan...
The way computer processors are built is changing. Nowadays, computer processor performance is incre...
The transition to multi-core architectures can be attributed mainly to fundamental limitations in cl...
The shared memory systems should support parallelization at the computation (multi-core), communicat...
Abstract. With the evolution toward fast networks of many-core pro-cessors, the design assumptions a...
Improving the performance of future computing systems will be based upon the ability of increasing t...
With the number of cores on a chip continuing to increase, we are moving towards an era where many-c...
This whitepaper studies the various aspects and challenges of performance scaling on large scale sha...
Abstract—We propose a novel hardware support for three relaxed memory models, Release Consistency (R...
In NoC-based many-core processors, memory subsystem and synchronization mechanism are always the two...
As Moore’s law continues to unfold, two important trends have recently emerged. First, the growth of...
Many-core architectures are becoming a standard design alternative for embedded systems. The force t...
In this research the various issues that arise in the design and implementation of distributed shar...
This paper studies realization and performance comparison of the sequential and weak consistency mod...
Distributed shared-memory systems provide scalable performance and a convenient model for parallel p...
Abstract—Current processor design with ever more cores may ensure that theoretical compute performan...
The way computer processors are built is changing. Nowadays, computer processor performance is incre...
The transition to multi-core architectures can be attributed mainly to fundamental limitations in cl...
The shared memory systems should support parallelization at the computation (multi-core), communicat...
Abstract. With the evolution toward fast networks of many-core pro-cessors, the design assumptions a...
Improving the performance of future computing systems will be based upon the ability of increasing t...
With the number of cores on a chip continuing to increase, we are moving towards an era where many-c...
This whitepaper studies the various aspects and challenges of performance scaling on large scale sha...
Abstract—We propose a novel hardware support for three relaxed memory models, Release Consistency (R...
In NoC-based many-core processors, memory subsystem and synchronization mechanism are always the two...
As Moore’s law continues to unfold, two important trends have recently emerged. First, the growth of...
Many-core architectures are becoming a standard design alternative for embedded systems. The force t...
In this research the various issues that arise in the design and implementation of distributed shar...
This paper studies realization and performance comparison of the sequential and weak consistency mod...
Distributed shared-memory systems provide scalable performance and a convenient model for parallel p...
Abstract—Current processor design with ever more cores may ensure that theoretical compute performan...