This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to capture the processor description as well as the memory subsystem configuration, this environment offers support for system-level specification, intended for platform-based design. As a case study, it is presented the memory architecture exploration for a simple image processing application, yet a more robust environment evaluation is performed through the execution of some real-world benchmarks.1734735ArchC Website, , http://www.archc.orgGaisler, J., (2003) The LEON Processor User's Manual Version 1.0.10, , Gaisler Research, JanuaryGivardis, T., Vahid, F., Henkel,...
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizations...
The focus of the diploma thesis is set on analysing SystemC language which is used in design of syst...
Memory hierarchy is one of two dominating resource costs (power, latency, area) in system-on-chip d...
This paper presents an environment based on Sys-temC for architecture specification of programmable ...
This paper presents the cache configuration exploration of a programmable system, in order to find t...
This paper[3.5pc] presents the Platform Designer (PD) framework, a set of SystemC based tools that p...
In this paper is presented a processor centric approach for the modeling and simulation of multi-pro...
Abstract- In this paper we propose a system level design and refinement method-ology based on the Sy...
Incorporating algorithm and architecture level design space exploration in the early phases of the d...
Abstract This paper[3.5pc] presents the Platform Designer (PD) framework, a set of Sys-temC based to...
Embedded system designers continuously face a twofold challenge handling the ever-increasing complex...
In this paper, we present a novel system modeling language which targets primarily the development o...
Designing embedded system is a non-trivial task during which wrong choices can lead to extremely cos...
Integration of increasingly complex systems on a chip augments the need of system-level methods for ...
Abstract: Integration of increasingly complex systems on a chip augments the need of system-level me...
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizations...
The focus of the diploma thesis is set on analysing SystemC language which is used in design of syst...
Memory hierarchy is one of two dominating resource costs (power, latency, area) in system-on-chip d...
This paper presents an environment based on Sys-temC for architecture specification of programmable ...
This paper presents the cache configuration exploration of a programmable system, in order to find t...
This paper[3.5pc] presents the Platform Designer (PD) framework, a set of SystemC based tools that p...
In this paper is presented a processor centric approach for the modeling and simulation of multi-pro...
Abstract- In this paper we propose a system level design and refinement method-ology based on the Sy...
Incorporating algorithm and architecture level design space exploration in the early phases of the d...
Abstract This paper[3.5pc] presents the Platform Designer (PD) framework, a set of Sys-temC based to...
Embedded system designers continuously face a twofold challenge handling the ever-increasing complex...
In this paper, we present a novel system modeling language which targets primarily the development o...
Designing embedded system is a non-trivial task during which wrong choices can lead to extremely cos...
Integration of increasingly complex systems on a chip augments the need of system-level methods for ...
Abstract: Integration of increasingly complex systems on a chip augments the need of system-level me...
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizations...
The focus of the diploma thesis is set on analysing SystemC language which is used in design of syst...
Memory hierarchy is one of two dominating resource costs (power, latency, area) in system-on-chip d...