Silicon nanowire have shown promising potential in wide range of next generation CMOS electronics [1], opto-electronics, sensing applications [1] and quantum information processing. The strong confinement required to make quantum processes robust to temperature fluctuations and other scattering processes across large numbers of devices as required for many quantum computing proposals in silicon normally requires the aggressive scaling of devices to sub-10 nm dimensions which requires high quality lithography and well controlled etch processes [2-4]. Here we demonstrate a new approach to achieving high performance silicon nanowires using more relaxed lithography of 20 to 50 nm combined with multiple oxidation and etches to reduce the diamete...
The reliable and controllable fabrication of silicon nanowires is achieved, using mature CMOS techno...
We report a new and controlled top-down fabrication process to prepare locally thinned down silicon ...
[[abstract]]We propose a promising fabrication technology for single-electron transistors based on a...
Silicon nanowire have shown promising potential in wide range of next generation CMOS electronics [1...
Nanowire transistors are being investigated to solve short-channel effects in future CMOS technology...
Silicon nanowires have been patterned with mean widths down to 4 nm using top-down lithography and d...
For the last two decades research on grown nanowires has been motivated by their potential applicati...
This project develops a robust and reliable process to pattern sub 20 nm features in negative tone H...
Semiconductor nanotechnology is today a very well studied subject, and demonstrations of possible ap...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
We are reporting electrical properties of Si nanowire field-effect transistors with a Schottky barri...
This project developed a robust and reliable process to pattern < 5 nm features in negative tone Hyd...
Electron beam lithography, low-damage dry etch and thermal oxidation have been used to pattern Si n...
Si nanowires have a multitude of potential applications including transistors, memories, photovolta...
The reliable and controllable fabrication of silicon nanowires is achieved, using mature CMOS techno...
We report a new and controlled top-down fabrication process to prepare locally thinned down silicon ...
[[abstract]]We propose a promising fabrication technology for single-electron transistors based on a...
Silicon nanowire have shown promising potential in wide range of next generation CMOS electronics [1...
Nanowire transistors are being investigated to solve short-channel effects in future CMOS technology...
Silicon nanowires have been patterned with mean widths down to 4 nm using top-down lithography and d...
For the last two decades research on grown nanowires has been motivated by their potential applicati...
This project develops a robust and reliable process to pattern sub 20 nm features in negative tone H...
Semiconductor nanotechnology is today a very well studied subject, and demonstrations of possible ap...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
We are reporting electrical properties of Si nanowire field-effect transistors with a Schottky barri...
This project developed a robust and reliable process to pattern < 5 nm features in negative tone Hyd...
Electron beam lithography, low-damage dry etch and thermal oxidation have been used to pattern Si n...
Si nanowires have a multitude of potential applications including transistors, memories, photovolta...
The reliable and controllable fabrication of silicon nanowires is achieved, using mature CMOS techno...
We report a new and controlled top-down fabrication process to prepare locally thinned down silicon ...
[[abstract]]We propose a promising fabrication technology for single-electron transistors based on a...
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