This paper presents a CMOS circuit implementation of a spike event coding/decoding scheme for transmission of analog signals in a programmable analog array. This scheme uses spikes for a time representation of analog signals. No spikes are transmitted using this scheme when signals are constant, leading to low power dissipation and traffic reduction in a shared channel. A proof-of-concept chip was designed in a 0.35 mum process and experimental results are presented
This paper presents a new approach to develop Field Programmable Analog Arrays (FPAAs), 1 which avoi...
The first part of this work concerns analog decoding. It presents the design of the I/O interface fo...
Indiveri G, Chicca E, Douglas RJ. A VLSI array of low-power spiking neurons and bistable synapses wi...
This paper presents the computation properties of an asynchronous spike event coding scheme employed...
This work is the result of the definition, design and evaluation of a novel method to interconnect t...
An event coded configurable analog circuit block that forms the building block of a programmable ana...
This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 n...
Thesis (Ph. D.)--Massachusetts Institute of Technology, School of Architecture and Planning, Program...
Design choices in CMOS analog signal processing circuits are presented. Special attention is focusse...
CMOS technology has provided an integrated circuit equivalent for the conventional electromechanical...
This paper discusses a low-power spike detection circuit, which reduces bandwidth from neural record...
In this work, programmable analog techniques using floating-gate transistors have been developed to ...
Spiking sensors such as the silicon retina and cochlea encode analog signals into massively parallel...
This paper presents a core cell that can be reconfigured and combined with current mirrors to implem...
An event-driven analogue-to-digital converter (ADC) architecture is proposed. The proposed architect...
This paper presents a new approach to develop Field Programmable Analog Arrays (FPAAs), 1 which avoi...
The first part of this work concerns analog decoding. It presents the design of the I/O interface fo...
Indiveri G, Chicca E, Douglas RJ. A VLSI array of low-power spiking neurons and bistable synapses wi...
This paper presents the computation properties of an asynchronous spike event coding scheme employed...
This work is the result of the definition, design and evaluation of a novel method to interconnect t...
An event coded configurable analog circuit block that forms the building block of a programmable ana...
This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 n...
Thesis (Ph. D.)--Massachusetts Institute of Technology, School of Architecture and Planning, Program...
Design choices in CMOS analog signal processing circuits are presented. Special attention is focusse...
CMOS technology has provided an integrated circuit equivalent for the conventional electromechanical...
This paper discusses a low-power spike detection circuit, which reduces bandwidth from neural record...
In this work, programmable analog techniques using floating-gate transistors have been developed to ...
Spiking sensors such as the silicon retina and cochlea encode analog signals into massively parallel...
This paper presents a core cell that can be reconfigured and combined with current mirrors to implem...
An event-driven analogue-to-digital converter (ADC) architecture is proposed. The proposed architect...
This paper presents a new approach to develop Field Programmable Analog Arrays (FPAAs), 1 which avoi...
The first part of this work concerns analog decoding. It presents the design of the I/O interface fo...
Indiveri G, Chicca E, Douglas RJ. A VLSI array of low-power spiking neurons and bistable synapses wi...