Paper submitted to the XVIII Conference on Design of Circuits and Integrated Systems (DCIS), Ciudad Real, España, 2003.A new conception of flexible calculation that allows us to adjust an operation depending on the available time computation is presented. The proposed arithmetic unit is based on this principle. It contains a control operation module that determines the process time of each calculation. The operation method design uses precalculated data stored in look-up tables, which provide, above all, quality results and systematization in the implementation of low level primitives that set parameters for the processing time. We report an evaluation of the architecture in area, delay and computation error, as well as a suitable implement...
The construction and design process of a high-resolution time-interval measuring system implemented ...
In this paper, we present a design technique for providing low area overhead fault tolerance in data...
This paper presents FloPoCo, a framework for easily designing custom arithmetic datapaths for FPGAs....
Paper submitted to the XVIII Conference on Design of Circuits and Integrated Systems (DCIS), Ciudad ...
A new operation model of flexible calculation that allows us to adjust the operation delay depending...
Paper submitted to 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS), ...
This paper presents a paradigm of real-time processing on the lowest level of computing systems: the...
<p>This paper presents a paradigm of real-time processing on the lowest level of computing systems: ...
International audienceFloating-Point (FP) computation using standard IEEE formats has a significant ...
The formal neuron is a processing unit that performs a number of complex mathematical operations on ...
The construction and design process of two high-resolution time-interval measuring systems implement...
W tej pracy dyplomowej przedstawiono różne metody cyfrowego pomiaru czasu wysokiej precyzji i przean...
We presents the design and test results of a picosecond-precision time interval measurement module, ...
We propose the first hardware implementation of standard arithmetic operators – addition, multiplica...
Arithmetic operations are among the most frequently-used operations in contemporary digital integrat...
The construction and design process of a high-resolution time-interval measuring system implemented ...
In this paper, we present a design technique for providing low area overhead fault tolerance in data...
This paper presents FloPoCo, a framework for easily designing custom arithmetic datapaths for FPGAs....
Paper submitted to the XVIII Conference on Design of Circuits and Integrated Systems (DCIS), Ciudad ...
A new operation model of flexible calculation that allows us to adjust the operation delay depending...
Paper submitted to 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS), ...
This paper presents a paradigm of real-time processing on the lowest level of computing systems: the...
<p>This paper presents a paradigm of real-time processing on the lowest level of computing systems: ...
International audienceFloating-Point (FP) computation using standard IEEE formats has a significant ...
The formal neuron is a processing unit that performs a number of complex mathematical operations on ...
The construction and design process of two high-resolution time-interval measuring systems implement...
W tej pracy dyplomowej przedstawiono różne metody cyfrowego pomiaru czasu wysokiej precyzji i przean...
We presents the design and test results of a picosecond-precision time interval measurement module, ...
We propose the first hardware implementation of standard arithmetic operators – addition, multiplica...
Arithmetic operations are among the most frequently-used operations in contemporary digital integrat...
The construction and design process of a high-resolution time-interval measuring system implemented ...
In this paper, we present a design technique for providing low area overhead fault tolerance in data...
This paper presents FloPoCo, a framework for easily designing custom arithmetic datapaths for FPGAs....