A Smart Gate Driver IC for Enhancement Mode GaN Power Transistor with Dead-time Correction

Researchers in power electronics have been optimizing silicon devices with novel structures and gate drivers to keep up with the growing demands for power management. However, the improvement has slowed down as silicon power devices approach their theoretical limits. The emergence of GaN power devices provides an avenue to meet the continuing demands for performance improvement. GaN demonstrates material properties such as wider bandgap, higher electron mobility, and higher critical electrical field when compared to silicon. In particular, the AlGaN/GaN HEMTs exhibit great potential of lower on-resistance and smaller gate capacitance, leading to reduced conduction and switching losses. Their fast switching frequency (>10’s MHz) can further help to reduce the size of the passive components. Driving enhancement mode (E-mode) GaN HEMT is similar to driving silicon power MOSFETs but with additional challenges. The optimum gate driving voltage for most E-mode HEMTs is 6 V but the maximum allowed gate voltage is 7 V, leaving a narrow driving window. This restricts the maximum dν/dt and di/dt as little gate ringing can be tolerated. Consequentially, the active driving technique is often employed to suppress the gate ringing while maintaining the fast turn-on and turn-off transitions. Moreover, the fast switching requires precise dead-time control to avoid shoot-through current between the supply voltage and ground. However, excessively long dead-times lead to unwanted reverse conduction and additional power loss. Therefore, high precision detection circuits are important for dead-time correction as the load current changes. In this thesis, a reverse conduction sensing circuit that can accommodate the large voltage swings at the switching node is designed to track the presence of reverse conduction. The proposed segmented gate driver IC for E-mode GaN power output stages, fabricated using TSMC’s 0.18 µm Gen-2 process, is equipped with dead-time correction for improving system efficiency and highly configurable gate drivers for ringing suppression. The one-step correction mode can optimize the dead-times for both the turn-on and turn-off edges within one switching cycle for switching frequencies of up to 10 MHz with 0.32 ns precision. This allows the power converters to maintain optimal conversion efficiency over a wide output current range.Ph.D