Electromagnetic interference stress testing

grantor: University of TorontoAn electronic system subjected to the stress of electromagnetic interference may fail to operate normally, just as it may fail under the stress of high temperature. Elevated temperature has traditionally been used as a stress test to "burn-in" electronic systems. The premise is that design flaws and substandard components that would eventually cause a system to fail will cause failure sooner under the burden of a stress test. In this way systems that are sub-standard can be eliminated from the production stream. In this work, electromagnetic interference, rather than elevated temperature, is used as the stress. The focus of this work is on measuring and interpreting the electromagnetic interference required to cause failure as a function of interference frequency and applicator position over the target printed circuit board. In order to measure this failure threshold, an electromagnetic interference stress testing apparatus is designed, including the required hardware and software. The applicator characteristics and the program used to diagnose failures are found to be the key aspects of a successful stress test. The interpretation of the measured failure threshold is aided by theory developed in this work. The theory predicts the dependence of the induced voltage at various positions along a printed circuit board track on the interference frequency and the applicator position. This theory can be used to predict the position on the target track of the device most likely to be causing the failure. Experiments validate both the stress testing apparatus and the theory used to locate failures. Three failures are studied in this work. The first failure occurs due to rectification at a tri-stated driver. The second is a failure due to a weak component: a memory chip functions normally without stress, but retrieves incorrect data when subjected to electromagnetic interference. The final failure is due to timing violations caused by delays induced by electromagnetic interference. For each of these failures, the theoretical prediction of frequency and applicator position effects is verified by comparison with measurements. The combination of theory and experiment described above validates the use of electromagnetic interference as a stress test. Such a test can be used to locate faulty components and design flaws on printed circuit boards.Ph.D