Atomic-scale assessment of graphene-substrate interactions, grain boundaries, and materials for heterostructures

This dissertation examines several of the current limitations and barriers to integration of graphene into scalable nanoelectronic devices, primarily defects from wafer-scale graphene synthesis, graphene-substrate interactions, and growth of graphene’s insulating analog, hexagonal boron nitride (h-BN). These experimental studies are fundamental in nature, but they highlight parameters relevant to applications. Chemical vapor deposition (CVD) growth of graphene on Cu foil provides one path to wafer-scale graphene, but it creates rotationally misoriented graphene domains that form grain boundaries (GBs) when these domains merge. These graphene GBs strongly perturb the local graphene electronic structure, leading to localized states and decreased the local work functions. The GBs induce p-n-p and p-p’-p (p’ < p) potential barriers that scatter charge carriers. This effect occurs over a length scale of ~1 – 2 nm on either side of the GBs. We employ the ultrahigh vacuum scanning tunneling microscope (UHV-STM) to study the interaction between graphene and the clean Si(111) – 7×7 surface. The STM measurements exhibit an electronic semi-transparency effect in which the substrate electronic structure is resolved “through” the graphene. Combining STM results with simulations indicate that the STM tip pushes the graphene closer to the surface. Many studies identify h-BN the ideal insulating substrate for graphene. However, full understanding of the mechanisms for CVD growth of h-BN on Cu foil is lacking. The chamber pressure during the growth step has a dramatic effect on the morphology, chemical structure, and growth rate of the resulting h-BN films. Growth of h-BN by low pressure CVD creates planar, uniform h-BN, while growth at higher pressures gives more disordered films with amorphous, polymeric surface layers due to passivation of the Cu catalyst substrate