Hardware intrusion detection for supply-chain threats to critical infrastructure embedded systems

Along with an increase in cyber security concerns for critical infrastructure applications, there is a growing concern and lack of solutions for cyber-based supply chain and device life-cycle threats. The challenge for this application space is that cost-driven engineering and market viability requires the use of commercially available off-the-shelf (COTS) components or just-in-time (JIT) manufacturing processes for sub-assemblies most of which originate from unsecured foreign facilities. In addition, many of the deployed embedded system devices are easily accessible (i.e. poor physical security) and can easily be tampered with or altered during their life-cycle such that the authentication or integrity of the devices cannot be assured. In this research I propose the foundations of a new technology that helps address these growing issues with a hardware-based intrusion detection system. This technology combines the use of an analog signal response from a resistor-capacitor circuit and machine learning techniques to not only identify the presence of a hardware Trojan on an inter-chip communication bus at 100% accuracy for the dataset of over 2000 measurements, but which also correctly distinguishes between several types of implanted Trojans at 89% accuracy. And while this research has focused on the security of inter-chip communication, it demonstrates the possibility of using low-power analog signals for device-level information assurance