Knowledge-based testing of VLSI circuits

This thesis addresses the problem of testing complex VLSI circuits. Traditional test generation used either low level gate descriptions or low level heuristics such as controllability and observability. In this thesis we have introduced a knowledge based approach to testing, which is based on (i) a hierarchical structural description of the circuit, (ii) a high level behavioral description, and (iii) high-level reasoning. The high-level behavior is specified by a (a) forward function, (b) reverse mfunction, (c) propapage-error functions and (d) the test mfunction for the device. It is shown that this additional knowledge results in significant speedup of the test generation process. We have also developed a new procedure for testing VLSI circuits which have both data and control components. We use the knowledge of data and control paths to propagate and backtrace differently for data and control paths. This results in a substantial speedup of the test generation process for complex VLSI circuits. Finally we have introduced a concept of Class B sequential circuits and developed a technique for testing these circuits, which during the propagate phase of testing a fault marks other tests which are covered by the current test. This drastically reduces the number of tests generated and the time taken for testing Class B sequential circuits.U of I OnlyETDs are only available to UIUC Users without author permissio