Issues in the architecture of direct interconnection schemes for multiprocessors

Direct connected multiprocessors are constructed by connecting processing nodes together with point-to-point links. This thesis will undertake an analysis of issues pertaining to the performance and reliability of direct connected multiprocessor architectures. The hypercube structure is a direct connected network of particular interest because of its simplicity, symmetry, and connectivity. For this reason, the first part of the thesis will focus on the hypercube. Mathematical models, similar to those used for multistage networks, will be developed to predict the performance and reliability of the hypercube. The results of these studies are of practical interest to multiprocessor system architects considering a hypercube interconnection structure. The remainder of the thesis uses the hypercube as a standard for measuring the potential of alternate topologies. First, it examines two direct connection structures that have been considered in the literature to be superior to the hypercube. The results show that these alternate networks fail to deliver the anticipated performance improvements. Second, the thesis introduces a new constraint into the performance analysis of networks--the width of the communication channel between nodes. This study considers the various cost-performance tradeoffs encountered when implementing different network topologies in hardware.U of I OnlyETDs are only available to UIUC Users without author permissio