Thus far, parallelism at the loop level (or data-parallelism) has been almost exclusively the main target of parallelizing compilers. The variety of new parallel architectures and recent progress in interprocedural dependence analysis suggest new directions for the exploitation of parallelism across loop and procedure boundaries (or functional-parallelism). This thesis studies the problem of extracting functional parallelism from sequential programs. It presents the Hierarchical Task Graph (HTG) as an intermediate parallel program representation which encapsulates data and control dependences, and which can be used for the extraction and exploitation of functional parallelism. Control and data dependences require synchronization between tas...
This thesis considers how to speed up the execution of functional programs using parallel execution,...
The speed-up estimation of parallelized code is crucial to efficiently compare different paralleliza...
. Research into automatic extraction of instruction-level parallelism and data parallelism from sequ...
Thus far, parallelism at the loop level (or data-parallelism) has been almost exclusively the main t...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2012.Speculative parallelizatio...
With the rise of Chip multiprocessors (CMPs), the amount of parallel computing power will increase s...
Task-parallel languages are increasingly popular. Many of them provide expressive mechanisms for int...
This paper describes the design and use of a new tool for profiling the parallelism present in annot...
The notion of dependence captures the most important properties of a program for efficient execution...
International audienceThis paper describes a tool using one or more executions of a sequential progr...
With the rise of Chip multiprocessors (CMPs), the amount of parallel computing power will increase s...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
While the chip multiprocessor (CMP) has quickly become the predominant processor architecture, its c...
Thesis (Ph. D.--University of Rochester. Dept. of Computer Science, 1991. Simultaneously published i...
This thesis considers how to speed up the execution of functional programs using parallel execution,...
The speed-up estimation of parallelized code is crucial to efficiently compare different paralleliza...
. Research into automatic extraction of instruction-level parallelism and data parallelism from sequ...
Thus far, parallelism at the loop level (or data-parallelism) has been almost exclusively the main t...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2012.Speculative parallelizatio...
With the rise of Chip multiprocessors (CMPs), the amount of parallel computing power will increase s...
Task-parallel languages are increasingly popular. Many of them provide expressive mechanisms for int...
This paper describes the design and use of a new tool for profiling the parallelism present in annot...
The notion of dependence captures the most important properties of a program for efficient execution...
International audienceThis paper describes a tool using one or more executions of a sequential progr...
With the rise of Chip multiprocessors (CMPs), the amount of parallel computing power will increase s...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
While the chip multiprocessor (CMP) has quickly become the predominant processor architecture, its c...
Thesis (Ph. D.--University of Rochester. Dept. of Computer Science, 1991. Simultaneously published i...
This thesis considers how to speed up the execution of functional programs using parallel execution,...
The speed-up estimation of parallelized code is crucial to efficiently compare different paralleliza...
. Research into automatic extraction of instruction-level parallelism and data parallelism from sequ...