Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO₂ gate stack

We present a systematic investigation of the temperature dependent relaxation current behavior for single layer and dual layer Pt metal nanocrystal (MNC)-based Al2O3/SiO2 flash memory gate stacks. Stacks containing single layer Pt MNC exhibit a dual-slope behavior in the log-log plots of the relaxation transient, whereas those with dual layer Pt MNC exhibit a single-slope behavior. We propose a physical model embodying two competing relaxation mechanisms to explain the Pt MNC induced relaxation current-thermionic emission and the quantum tunneling. Based on this model, the dual-slope behavior of single layer MNC-based gate stack can be ascribed to the dominance of thermionic emission at the initial part and quantum tunneling at the tail part. In contrast, the single slope behavior of the dual layer metal nanocrystal-based stack arises from the dominance of the quantum tunneling throughout the relaxation. In addition, we verify that stacks containing dual layer MNC show better retention property than their single layer counterparts. Our results demonstrate that relaxation current measurements offer a simple way to assess the charge retention capability for MNC-based gate stacks