A Hardware Implementation of Spike Sorting Using the Dirichlet Process Mixture Model

This thesis presents a sampling-based hardware implementation of neuron spike sorting. Neuron spike sorting is an application that categorizes electrical signals read from the brain based on the neuron that produced the signal. Probes used to read brain signals are generally unable to record neural impulses from a single neuron, but instead capture signals from multiple neurons surrounding the neuron of interest. In order to extract useful information from the signal, it is necessary to determine which neuron spike in the wave form was produced by which neuron. Since the probe may be in contact with an indefinite number of neurons, spike sorting is essentially a clustering problem where the number of clusters is unknown. We modeled the spike sorting application as a Dirichlet process mixture model and implemented a circuit to cluster neuron spikes using a random sampling algorithm. The code for the circuit was written in Verilog and then synthesized on to a Xilinx ZedBoard Zynq Evaluation and Development Kit (xc7z020clg484-1) FPGA. The input and output for the circuit are handled by the embedded ARM processor on the board. We tested the circuit with synthetic data and found that the sorting accuracy was comparable to that of both deterministic software implementations and our sampling-based software model. In the future, we hope to use this circuit as a model for solving other difficult problems using sampling methods.U of I OnlyUndergraduate senior thesis not recommended for open acces