Tool Independent High-Level Synthesis - with a comparison between Mentor Catapult and Cadence Stratus

High-level synthesis is by many seen as the next step in the ever-increasing abstraction levels of digital hardware design. During development at this level there is a high risk of getting locked into tools by a single supplier, as many aspects of the design description are not standardised. In this thesis two of the most popular HLS-tools on the market are evaluated; Mentor Graphics Catapult and Cadence Stratus. The tools are compared in terms of features, development work flow efficiency and quality of generated RTL. The RTL’s are tested by doing synthesis using Cadence Genus. For the example block, Catapult is shown to generate higher quality RTL. Catapult is also shown to offer twice as fast simulation of synthesisable SystemC hardware descriptions, at the cost of being locked into the tool because of data type incompatibility with other HLS tools. From this, recommendations and development guidelines for avoiding to become dependent on a single tool are made