Design of a power amplifier for NB-IoT

An inverse class D power amplifier and a class A power amplifier are designed at schematic level for 20 dBm power class and NB-IoT specification in 65 nm CMOS technology. A suitable switch mode supply modulator is also designed. Three different efficiency enhancement techniques namely EER, Hybrid EER and ET are studied and the suitable transmitters are simulated for each in Cadence Virtuoso. These transmitters are compared with each other on the basis of output power, efficiency, and NB-IoT specifications of EVM and ACPR. The peak efficiency achieved by the supply modulator is 90%. The peak output power that can be achieved by ET, EER and hybrid EER is 24 dBm with efficiency of 37%, 28 dBm with an efficiency of 66% and 28 dBm with an efficiency of 66% respectively. It is also observed that, the low modulation bandwidth and relaxed specifications of NB-IoT standard, make EER architecture more tolerant to the delay mismatch between the envelope and phase path as compared to the other standards like 802.11a (Wi-Fi). With a delay of T/13, where T is the symbol duration, EER achieves a maximum power of 26 dBm while staying within limit of EVM and ACPR specified by NB-IoT. Thus, according to the analysis conducted in the report, EER with inverse class D amplifier proves to be the most promising architecture for NB-IoT specifications as compared to ET and hybrid EER architectures.The rapid growth in connected devices promises lucrative business opportunities in the Internet of Things (IoT) segment. Narrow Band IoT (NB-IoT) is a new mobile standard. The services leveraging Low Power Wide Area technologies desire wide coverage along with low power consumption and a large number of connections. As lifetime of 10 years or more is desired in battery operated devices, it makes low power consumption an important requirement for such devices. The overall power efficiency of a radio circuit is strongly dependent on the power amplifier (PA). Design of the power amplifier also depends on the transmission technique to be used. As a result, the design and implementation of the PA as well as selection of the transmission technique requires detailed attention and efforts to ensure the maximum efficiency and sufficient linearity. In this project, an inverse class D power amplifier and a class A power amplifier are designed at a schematic level for NB-IoT specifications in 65 nm CMOS technology. These power amplifiers are designed for 20 dBm power class. A switch mode supply modulator is also designed. Since the efficiency is a crucial factor that enables extending battery life of the devices, three different efficiency enhancement techniques: Envelope Elimination and Restoration (EER), hybrid EER and Envelope Tracking (ET) are studied and the transmitters are simulated for each technique. These transmitters are compared with each other on the basis of the output power, efficiency, NB-IoT specifications of EVM and ACPR. According to the analysis conducted in the report, EER with inverse class D amplifier proves to be the most promising architecture for the NB-IoT applications