Defects in semiconductor memory chips and errors of their functioning are of interest to both manufacturers of memory and their consumers. Memory errors can be classified into soft errors, which randomly corrupt bits but do not leave physical damage; and hard errors, which corrupt bits in a repeatable manner because of a physical defect. Some time ago numerous studies concerning the distribution of failures and bit errors in chips and semiconductor memory systems were conducted
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The topic of this thesis is about soft-errors in digital systems. Different aspects of soft-errors h...
The soft error rates of memories are increased by high-energy particles as technology shrinks. Singl...
Semiconductor memories have been always used to push silicon technology at its limit. This makes the...
SUMMARY This paper proposes a soft-error model for accurately esti-mating reliability of a computer ...
[[abstract]]We present an error catch and analysis (ECA) system for semiconductor memories. The syst...
Memory hardware reliability is an indispensable part of whole-system dependability. This paper prese...
Abstract: Memory testing in general, and DRAM testing in particular, has become greatly dependent on...
[[abstract]]Fault analysis is an important step in establishing detailed fault models or subsequent ...
Thesis (Ph. D.)--University of Rochester. Dept. of Electrical and Computer Engineering, 2012In moder...
In this thesis, we study the problem of faults in modern semiconductor memory structures and their t...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
All modern computers have memories built from VLSI RAM chips. Individually, these devices are highl...
Technology and voltage scaling is making integrated circuits increasingly susceptible to failures ca...
[[abstract]]As VLSI technology advances and memories occupy more and more area in a typical SOC, mem...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The topic of this thesis is about soft-errors in digital systems. Different aspects of soft-errors h...
The soft error rates of memories are increased by high-energy particles as technology shrinks. Singl...
Semiconductor memories have been always used to push silicon technology at its limit. This makes the...
SUMMARY This paper proposes a soft-error model for accurately esti-mating reliability of a computer ...
[[abstract]]We present an error catch and analysis (ECA) system for semiconductor memories. The syst...
Memory hardware reliability is an indispensable part of whole-system dependability. This paper prese...
Abstract: Memory testing in general, and DRAM testing in particular, has become greatly dependent on...
[[abstract]]Fault analysis is an important step in establishing detailed fault models or subsequent ...
Thesis (Ph. D.)--University of Rochester. Dept. of Electrical and Computer Engineering, 2012In moder...
In this thesis, we study the problem of faults in modern semiconductor memory structures and their t...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
All modern computers have memories built from VLSI RAM chips. Individually, these devices are highl...
Technology and voltage scaling is making integrated circuits increasingly susceptible to failures ca...
[[abstract]]As VLSI technology advances and memories occupy more and more area in a typical SOC, mem...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The topic of this thesis is about soft-errors in digital systems. Different aspects of soft-errors h...
The soft error rates of memories are increased by high-energy particles as technology shrinks. Singl...