International audienceEmerging non-volatile memory technologies open new perspectives for original computing architectures. Recent work have demonstrated the potential of flexible architectures that rely on power-gated distributed Magnetoresistive Random-Access Memory (MRAM). The proposed architecture uses a Network-on- Chip (NoC) to interconnect MRAM-based clusters and distribute application-specific commands to MRAM devices by means of packets. Configurable Network Interfaces allow to transform MRAM devices into smart units able to respond to incoming commands. With such an approach, the NoC becomes the energy bottleneck. In this paper we introduce a possible next step, which consists in optimising the NoC architecture by means of Wireles...
none4Most communication traffic in today’s System on Chips (SoC) is DRAM centric. The NoC should be ...
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia...
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture forMulti-Processor...
International audienceEmerging non-volatile memory technologies open new perspectives for original c...
International audienceEmerging non-volatile memory technologies open new perspectives for original c...
International audienceThe paper presents a novel flexible low-power architecture for memory-based co...
Network-on-Chip (NoC) is a de facto inter-core communication infrastructure for future Chip Multipro...
International audienceParallel computing is essential to achieve the manycore architecture performan...
Modern systems-on-chip (SoCs) today contain hundreds of cores, and this number is predicted to reach...
International audienceEfficient synchronization is one of the basic requirements of effective parall...
International audienceOver the past few years, a new era of smart connected devices has emerged in t...
Impediments to main memory performance have traditionally been due to the divergence in processor ve...
none4Most communication traffic in today’s System on Chips (SoC) is DRAM centric. The NoC should be ...
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia...
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture forMulti-Processor...
International audienceEmerging non-volatile memory technologies open new perspectives for original c...
International audienceEmerging non-volatile memory technologies open new perspectives for original c...
International audienceThe paper presents a novel flexible low-power architecture for memory-based co...
Network-on-Chip (NoC) is a de facto inter-core communication infrastructure for future Chip Multipro...
International audienceParallel computing is essential to achieve the manycore architecture performan...
Modern systems-on-chip (SoCs) today contain hundreds of cores, and this number is predicted to reach...
International audienceEfficient synchronization is one of the basic requirements of effective parall...
International audienceOver the past few years, a new era of smart connected devices has emerged in t...
Impediments to main memory performance have traditionally been due to the divergence in processor ve...
none4Most communication traffic in today’s System on Chips (SoC) is DRAM centric. The NoC should be ...
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia...
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture forMulti-Processor...