Optimisation of Pixel Modules for the ATLAS Inner Tracker at the High-Luminosity LHC

The Large Hadron Collider and its pre-accelerator complex will be upgraded in three steps to allow for the high luminosity phase. A factor of ten times more data will be collected in this period by facilitating the increased instantaneous luminosity being seven times as large as the original design value. A new inner tracker system is in preparation for the ATLAS detector in view of the high luminosity phase to start operation around 2026. This all silicon tracker relies on various innovative technologies to cope with the severe challenges arising from the increased luminosity. The pixel detector employs a new readout chip to decrease the pixel size to a fifth of the pixel size of the present generation to be able to disentangle all tracks in the high multiplicity environment close to the interaction point. Thanks to their reduced power dissipation and high charge collection efficiency after irradiation, thin planar n-in-p pixel sensors are ideally suited to cope with the expected unprecedented radiation damage. TCAD simulations are being performed to optimise the sensor layout for the new pixel cell size of 50 × 50 μm2. In this study, charge collection efficiency, electronic noise and electrical field properties are investigated both before and after irradiation. The RD53A prototype readout chip is used to build modules based on the proposed thin planar n-in-p sensors. The performance of different sensor designs is assessed by analysing data from various test-beam campaigns. The effects of storage time at room temperature for the ITk pixel detector during maintenance periods are reproduced on real modules. Pixel detector modules built with sensors of 100−150 μm thickness are characterised with testbeam measurements. The charge collection and hit efficiencies are compared before and after annealing at room temperature up to one year