This paper proposes a new solution to improve the performance parameters of on-chip antenna designs on standard CMOS silicon (Si.) technology. The proposed method is based on applying the metasurface technique and exciting the radiating elements through coupled feed mechanism. The on-chip antenna is constructed from three layers comprising Si.-GND-Si. layers, so that the ground (GND) plane is sandwiched between two Si. layers. The silicon and ground-plane layers have thicknesses of 20μm and 5μm, respectively. The 3×3 array consisting of the asterisk-shaped radiating elements has implemented on the top silicon layer by applying the metasurface approach. Three slot lines in the ground-plane are modelled and located directly under the radiatin...
In this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon tec...
This paper presents the results of a study on improving the performance parameters such as the imped...
This paper presents the design of a high-performance 0.45-0.50 THz antenna on chip (AoC) for fabrica...
This paper proposes a new solution to improve the performance parameters of on-chip antenna designs ...
This paper proposes a new solution to improve the performance parameters of on-chip antenna designs ...
YesIn this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon ...
The results presented in this paper show that by employing a combination of metasurface and substrat...
In this letter, a novel on-chip array antenna with high-performances is investigated which is based ...
This paper shows that by employing a combination of metamaterial (MTM) and substrate integrated wave...
This paper presents the results of a study on improving the performance parameters such as the imped...
In this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon tec...
This paper presents the results of a study on improving the performance parameters such as the imped...
This paper presents the design of a high-performance 0.45-0.50 THz antenna on chip (AoC) for fabrica...
This paper proposes a new solution to improve the performance parameters of on-chip antenna designs ...
This paper proposes a new solution to improve the performance parameters of on-chip antenna designs ...
YesIn this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon ...
The results presented in this paper show that by employing a combination of metasurface and substrat...
In this letter, a novel on-chip array antenna with high-performances is investigated which is based ...
This paper shows that by employing a combination of metamaterial (MTM) and substrate integrated wave...
This paper presents the results of a study on improving the performance parameters such as the imped...
In this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon tec...
This paper presents the results of a study on improving the performance parameters such as the imped...
This paper presents the design of a high-performance 0.45-0.50 THz antenna on chip (AoC) for fabrica...