This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been designed and manufactured in a standard 0.35μm n-well CMOS technology with one poly layer and five metal layers. It contains a digital shell for control and data interchange, and a central array of 128 × 128 identical cells, each cell corresponding to a pixel. Die size is 11.885 × 12.230mm2 and cell size is 75.7μm × 73.3μm. Each cell contains 198 transistors dedicated to functions like processing, storage, and sensing. The system is oriented to real-time, single-chip image acquisition and processing. Since each pixel performs the basic functions of sensing, processing and storage, data transferences are fully parallel (i...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed Analog VLSI Image acquisition and pre-processing system is descri...
International audienceA high speed Analog VLSI Image acquisition and pre-processing system is descri...
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-P...
This paper presents a monolithic 128 x128 pixel optical sensor with analogue-to-digital converters, ...
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisi...
A mixed-signal Cellular Visual Microprocessor architecture with digital processors is described. An...
Event: SPIE Photonics Europe, 2010, Brussels, BelgiumThis paper presents an architecture for the imp...
An operational vision-chip prototype with a wide-range of potential applications in artificial-visio...
During the last years, a growing interest in collecting an as large as possible number of data from ...
http://digital.csic.es/handle/10261/83126Vertically integrated focal-plane sensor-processor chip des...
Comunicación presentada al "Optical Sensing and Detection" celebrado en Bruselas (Bélgica) del 12 al...
CMOS Image Sensors (CIS) are key for imaging technologies. These chips are conceived for capturing o...
This paper proposes a novel programmable vision chip based on multiple levels of parallel processors...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed Analog VLSI Image acquisition and pre-processing system is descri...
International audienceA high speed Analog VLSI Image acquisition and pre-processing system is descri...
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-P...
This paper presents a monolithic 128 x128 pixel optical sensor with analogue-to-digital converters, ...
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisi...
A mixed-signal Cellular Visual Microprocessor architecture with digital processors is described. An...
Event: SPIE Photonics Europe, 2010, Brussels, BelgiumThis paper presents an architecture for the imp...
An operational vision-chip prototype with a wide-range of potential applications in artificial-visio...
During the last years, a growing interest in collecting an as large as possible number of data from ...
http://digital.csic.es/handle/10261/83126Vertically integrated focal-plane sensor-processor chip des...
Comunicación presentada al "Optical Sensing and Detection" celebrado en Bruselas (Bélgica) del 12 al...
CMOS Image Sensors (CIS) are key for imaging technologies. These chips are conceived for capturing o...
This paper proposes a novel programmable vision chip based on multiple levels of parallel processors...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed Analog VLSI Image acquisition and pre-processing system is descri...
International audienceA high speed Analog VLSI Image acquisition and pre-processing system is descri...