This research is part of a co-design project that has the goal of designing hardware systems to match application requirements and efficiently mapping applications to hardware. This thesis is focused on optimizing the platform cache memory hierarchy configuration. To determine application requirements, we characterize the application using platform- independent locality metrics. Next we use locality data and an analytical model to predict cache an application performance of sequential versions of application codes for various cache configurations. After using an analytical model to select a candidate set of cache memory hierarchy configurations, we used architectural simulation to test the selection for the targeted systems
Proceedings of: Third International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2016...
Cache is one of the most widely used components in today's computing systems. Its performance is hea...
Improving cache performance requires understanding cache behavior. However, measuring cache performa...
This research is part of a co-design project that has the goal of designing hardware syste...
Cache memory design in embedded systems can take advantage from the analysis of the software that ru...
Data locality is central to modern computer designs. The widening gap between processor speed and me...
For many applications, cache misses are the primary performance bottleneck. Even though much researc...
There is an ever widening performance gap between processors and main memory, a gap bridged by small...
With the software applications increasing in complexity, description of hardware is becoming increas...
The growing gap between processor clock speed and DRAM access time puts new demands on software and ...
Recently, multi-cores chips have become omnipresent in computer systems ranging from high-end server...
Thesis (Ph. D.)--University of Rochester. Department of Computer Science, 2017On modern processors, ...
Application performance on modern microprocessors depends heavily on performance related characteris...
Cache memories were incorporated in microprocessors in the early times and represent the most common...
Improving cache performance requires understanding cache behavior. However, measuring cache performa...
Proceedings of: Third International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2016...
Cache is one of the most widely used components in today's computing systems. Its performance is hea...
Improving cache performance requires understanding cache behavior. However, measuring cache performa...
This research is part of a co-design project that has the goal of designing hardware syste...
Cache memory design in embedded systems can take advantage from the analysis of the software that ru...
Data locality is central to modern computer designs. The widening gap between processor speed and me...
For many applications, cache misses are the primary performance bottleneck. Even though much researc...
There is an ever widening performance gap between processors and main memory, a gap bridged by small...
With the software applications increasing in complexity, description of hardware is becoming increas...
The growing gap between processor clock speed and DRAM access time puts new demands on software and ...
Recently, multi-cores chips have become omnipresent in computer systems ranging from high-end server...
Thesis (Ph. D.)--University of Rochester. Department of Computer Science, 2017On modern processors, ...
Application performance on modern microprocessors depends heavily on performance related characteris...
Cache memories were incorporated in microprocessors in the early times and represent the most common...
Improving cache performance requires understanding cache behavior. However, measuring cache performa...
Proceedings of: Third International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2016...
Cache is one of the most widely used components in today's computing systems. Its performance is hea...
Improving cache performance requires understanding cache behavior. However, measuring cache performa...