Multi-Processor Systems-on-Chip (MPSoC) platforms will definitely power various future autonomous machines. Due to the high complexity of such platforms, it is difficult to achieve timing predictability, reliability and efficient resource utilization at the same time. We believe that time-triggered scheduling in combination with PRedictable Execution Model (PREM) can provide strong safety guarantees, and our longerterm goal is to schedule execution on the whole MPSoC (CPUs and GPU) in time triggered manner. To extend PREM to GPUs, we compare two synchronization mechanisms available on the NVIDIA Tegra X2 platform: one based on pinned memory and another that uses a GPU timer (socalled globaltimer). We found that running the NVIDIA profiler (nvpr...
In this study, we provide an extensive survey on wide spectrum of scheduling methods for multitaskin...
Modern automotive-grade embedded computing platforms feature high-performance Graphics Processing Un...
Heterogeneous systems-on-A-chip are increasingly embracing shared memory designs, in which a single ...
In this thesis, we evaluate the interference between multiple GPU (Graphics processing unit) kernels...
Many applications require both high performance and predictable timing. High-performance can be prov...
Many applications require both high performance and predictable timing. High-performance can be prov...
Cyber-physical systems (CPS) integrate sensing, computing, communication and actuation capabilities ...
Recent NVIDIA Graphics Processing Units (GPUs) can ex-ecute multiple kernels concurrently. On these ...
Many applications require both high performance and predictable timing. High-performance can be prov...
The ever-increasing need for computational power in embedded devices has led to the adoption heterog...
Heterogeneous SoCs (HeSoCs) typically share a single DRAM between the CPU and GPU, making workloads ...
Self-driving cars, once constrained to closed test tracks, are beginning to drive alongside human dr...
There is an increasing interest among real-time systems architects for multi- and many-core accelera...
In this study, we provide an extensive survey on wide spectrum of scheduling methods for multitaskin...
Modern automotive-grade embedded computing platforms feature high-performance Graphics Processing Un...
Heterogeneous systems-on-A-chip are increasingly embracing shared memory designs, in which a single ...
In this thesis, we evaluate the interference between multiple GPU (Graphics processing unit) kernels...
Many applications require both high performance and predictable timing. High-performance can be prov...
Many applications require both high performance and predictable timing. High-performance can be prov...
Cyber-physical systems (CPS) integrate sensing, computing, communication and actuation capabilities ...
Recent NVIDIA Graphics Processing Units (GPUs) can ex-ecute multiple kernels concurrently. On these ...
Many applications require both high performance and predictable timing. High-performance can be prov...
The ever-increasing need for computational power in embedded devices has led to the adoption heterog...
Heterogeneous SoCs (HeSoCs) typically share a single DRAM between the CPU and GPU, making workloads ...
Self-driving cars, once constrained to closed test tracks, are beginning to drive alongside human dr...
There is an increasing interest among real-time systems architects for multi- and many-core accelera...
In this study, we provide an extensive survey on wide spectrum of scheduling methods for multitaskin...
Modern automotive-grade embedded computing platforms feature high-performance Graphics Processing Un...
Heterogeneous systems-on-A-chip are increasingly embracing shared memory designs, in which a single ...