In this paper, we show that clock faults producing duty-cycle variations, which have been proven very likely, can give rise to min or max delay violations. This mandates new, specific testing approaches for clock faults, to avoid them to compromise the system correct operation in the field, with dramatic effects on product quality and defect level. We then introduce a new scheme that can be employed to detect the clock faults causing duty-cycle variations. © 2013 Springer Science+Business Media New York
In today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features ...
In today's high performance (multi-GHz) microprocessors' design, on-chip clock calibration features ...
In today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features ...
In this paper, we show that clock faults producing duty-cycle variations, which have been proven ver...
In this paper, we show that clock faults producing duty-cycle variations, which have been proven ver...
We analyze the impact of clock faults on product quality and operation in the field. We show that cl...
Min delay violations are traditionally not modeled as possible faults as a result of manufacturing d...
We analyze the probability to detect clock faults indirectly through conventional functional testing...
The increasing clock frequencies have led to new fault effects of production defects. These so calle...
In this paper we present a novel approach for testing clock faults for high performance microproces...
We propose a new design for testability approach for testing clock faults of next generation high pe...
Based on real process data of a reference microprocessor, fault models are derived for the manufactu...
The increasing clock frequencies have led to new fault effects of production defects. These so calle...
In today's high performance (multi-GHz) microprocessors' design, on-chip clock calibration features ...
Continuous scaling of transistor feature size rapidly increases the effect of intermittent faults. T...
In today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features ...
In today's high performance (multi-GHz) microprocessors' design, on-chip clock calibration features ...
In today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features ...
In this paper, we show that clock faults producing duty-cycle variations, which have been proven ver...
In this paper, we show that clock faults producing duty-cycle variations, which have been proven ver...
We analyze the impact of clock faults on product quality and operation in the field. We show that cl...
Min delay violations are traditionally not modeled as possible faults as a result of manufacturing d...
We analyze the probability to detect clock faults indirectly through conventional functional testing...
The increasing clock frequencies have led to new fault effects of production defects. These so calle...
In this paper we present a novel approach for testing clock faults for high performance microproces...
We propose a new design for testability approach for testing clock faults of next generation high pe...
Based on real process data of a reference microprocessor, fault models are derived for the manufactu...
The increasing clock frequencies have led to new fault effects of production defects. These so calle...
In today's high performance (multi-GHz) microprocessors' design, on-chip clock calibration features ...
Continuous scaling of transistor feature size rapidly increases the effect of intermittent faults. T...
In today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features ...
In today's high performance (multi-GHz) microprocessors' design, on-chip clock calibration features ...
In today’s high performance (multi-GHz) microprocessors’ design, on-chip clock calibration features ...