Towards Robust and Cost-Effective Critical Real-Time Systems under Thermal-Aware Design

The advent of multi-core platforms in critical realtime domains such as the avionics, automotive and railways to achieve higher and higher computing performances has turned the view on thermal concerns of the underlying chip die while it is still mandatory to meet all the temporal constraints. As a matter of fact, high chip temperature may not only degrade system performance and reliability, but it may also damage the chip permanently. We propose a methodology to address this problem, based on fixed task-to-core mapping and per-core analysis to derive a sound system model without feedback loops. To this end, it is important to have a better and deeper understanding of the existing thermal models in the literature. This is the main contribution of this research.