Reducing the Production Cost of Semiconductor Chips Using (Parallel and Concurrent) Testing and Real-Time Monitoring

Consumer electronics changed the semiconductor industry by developing many new challenges for consumer products. One of the main challenges in the consumer product is that it propelled the volume of production to massive production, e.g. hundreds of millions of cell phones are produced yearly. Combined with the overproduction of consumer products, price pressure is another challenge for consumer products. Many of the new techniques used in the design and fabrication enabled the integration of more devices in the same chips. This reduced the cost of the chips, lowered the power consumption, increased the circuit operation speed, enabled more reliable implementation, and reduced physical size. Complications in the testing phase increased and the stress of the cost required new techniques in testing. Now, testing is the bottleneck in high volume production, and it counts for a notable share of the chip cost. This dissertation seeks to address the test cost challenges across two distinct works: 1- Combining the Parallel test technique with the Concurrent test on mixed-signal chips to have the PaRent testing. The PaRent testing will amplify the savings in test time and the throughput in production. 2- Real-time monitoring of manufacturing yield to be used in the production to reduce any wasted material and time due to issues not related to the chip itself