Journal ArticleIn this paper, we present a methodology to perform fast testing of the control path of self-timed circuits [91]. The speedup is achieved by testing all the execution paths in the control simultaneously. The circuits considered in this paper are those designed using an OCCAM based circuit compiler 121. This Compiler translates an OCCAM program description into an interconnection of pre-existing self-timed macro-modules (2, 10]. The method proposed involves modifying certain modules and structures in such a way that the circuits obtained by translation using these modified modules are testable in above mentioned way
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleThis paper presents a Design for Testability (DFT) tool called ACT (Asynchronous Cir...
Journal ArticleWe describe a technique to generate critical hazard-free tests for self-timed contro...
Journal ArticleThe problem of testing self-timed circuits generated by an automatic synthesis system...
Journal ArticleThis paper presents a partial scan method for testing control sections of macromodul...
Journal ArticleThis paper presents a partial scan method for testing both the control and data path...
technical reportThis paper presents a partial scan method for testing control sections of macromodul...
Journal ArticleWe present a tool called MEAT which has been designed to automatically synthesize tra...
Journal ArticleAsynchronous or self-timed systems that do not rely on U global clock to keep system...
technical reportWe have designed a set of self-timed gallium arsenide building blocks that are suita...
This dissertation is concerned with testing of asynchronous circuits. Asynchronous circuits are attr...
Test cost comprises a substantial portion of producing an integrated circuit. As a result, structura...
Journal ArticleMicropipelines, self-timed event-driven pipelines, are an attractive way of structuri...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleThis paper presents a Design for Testability (DFT) tool called ACT (Asynchronous Cir...
Journal ArticleWe describe a technique to generate critical hazard-free tests for self-timed contro...
Journal ArticleThe problem of testing self-timed circuits generated by an automatic synthesis system...
Journal ArticleThis paper presents a partial scan method for testing control sections of macromodul...
Journal ArticleThis paper presents a partial scan method for testing both the control and data path...
technical reportThis paper presents a partial scan method for testing control sections of macromodul...
Journal ArticleWe present a tool called MEAT which has been designed to automatically synthesize tra...
Journal ArticleAsynchronous or self-timed systems that do not rely on U global clock to keep system...
technical reportWe have designed a set of self-timed gallium arsenide building blocks that are suita...
This dissertation is concerned with testing of asynchronous circuits. Asynchronous circuits are attr...
Test cost comprises a substantial portion of producing an integrated circuit. As a result, structura...
Journal ArticleMicropipelines, self-timed event-driven pipelines, are an attractive way of structuri...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...
Journal ArticleSelf- timed circuits offer advantages over their synchronously clocked counterparts i...