Managing large address spaces effectively on the Butterfly

Journal ArticleThe BBN Butterfly? Parallel Processor is a commercially-available multiprocessor which uses a memory management strategy based on a segmentation of the available memory. Using all of the memory of the machine efficiently is difficult because of the need to change the memory mapping dynamically. This difficulty discourages the use of the Butterfly for applications requiring a large address space. This paper presents a scheme for using all of the Butterfly's memory with minimal impact through dynamic re-mapping of memory. Called SAR-smashing, it is appropriate for applications which require access to widely-scattered memory locations throughout a potentially large address space. The method was developed to support an OR-parallel logic programming system for the Butterfly which requires large stack data areas. Benchmark timing results for the memory access strategy are presented