Journal ArticleThis paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesizes each output individually. It begins by contracting the STG to include only transitions on the output of interest and its trigger signals. Next, the reachable state space for this contracted STG is analyzed to determine a minimal number of additional signals which must be reintroduced into the STG to obtain CSC. The circuit for this output is then synthesized from this STG. Results show that the quality of the circuit implementation is nearly as good as the one found from the full reachable state space, but it can be applied to find circuits for w...
Logic decomposition is a well-known problem in logic synthesis, but it poses new challenges when tar...
Journal ArticleIn this paper we present a systematic procedure to synthesize timed asynchronous cir...
The synthesis of asynchronous circuits is inherently complex for two different aspects. Firstly, the...
Journal ArticleAbstract-This paper presents a decomposition-based method for timed circuit design th...
This paper presents a novel technique for synthesis of speed-independent circuits. It is based on pa...
Asynchronous circuits can be modeled as concurrent systems in which events are interpreted as signal...
This paper presents a set of sufficient conditions for the gate-level synthesis of speed-independent...
Journal ArticleThis paper presents a new method to synthesize timed asynchronous circuits directly f...
This paper introduces a novel technique for synthesis of speed-independent circuits from their Signa...
This paper presents a novel methodology for the synthesis of speed-independent circuits from Signal ...
AbstractSTGs (Signal Transition Graphs) give a formalism for the description of asynchronous circuit...
This paper presents a solution to the problem of sequential multi-level logic synthesis of asynchron...
This paper presents theory and practical implementation of a method for multi-level logic synthesis ...
Methods for the synthesis of asynchronous circuits from signal transition graphs (STGs) have commonl...
The aim of this paper is to introduce a novel technique for synthesis of speed-independent circuits ...
Logic decomposition is a well-known problem in logic synthesis, but it poses new challenges when tar...
Journal ArticleIn this paper we present a systematic procedure to synthesize timed asynchronous cir...
The synthesis of asynchronous circuits is inherently complex for two different aspects. Firstly, the...
Journal ArticleAbstract-This paper presents a decomposition-based method for timed circuit design th...
This paper presents a novel technique for synthesis of speed-independent circuits. It is based on pa...
Asynchronous circuits can be modeled as concurrent systems in which events are interpreted as signal...
This paper presents a set of sufficient conditions for the gate-level synthesis of speed-independent...
Journal ArticleThis paper presents a new method to synthesize timed asynchronous circuits directly f...
This paper introduces a novel technique for synthesis of speed-independent circuits from their Signa...
This paper presents a novel methodology for the synthesis of speed-independent circuits from Signal ...
AbstractSTGs (Signal Transition Graphs) give a formalism for the description of asynchronous circuit...
This paper presents a solution to the problem of sequential multi-level logic synthesis of asynchron...
This paper presents theory and practical implementation of a method for multi-level logic synthesis ...
Methods for the synthesis of asynchronous circuits from signal transition graphs (STGs) have commonl...
The aim of this paper is to introduce a novel technique for synthesis of speed-independent circuits ...
Logic decomposition is a well-known problem in logic synthesis, but it poses new challenges when tar...
Journal ArticleIn this paper we present a systematic procedure to synthesize timed asynchronous cir...
The synthesis of asynchronous circuits is inherently complex for two different aspects. Firstly, the...