technical reportThe Cascade hardware architecture for high/variable precision arithmetic is described. It uses a radix-16 redundant signed-digit number representation and directly supports single or multiple precision addition, subtraction, multiplication, division, extraction of the square root and computation of the greatest common divisor. It is object-oriented and implements an abstract class of objects, variable precision integers. It provides a complete suite of memory management functions implemented in hardware, including a garbage collector. The Cascadei hardware permits free tradeoffs of space versus time
This paper addresses the potential speedup achieved by using decimal floating-point hardware, instea...
Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...
technical reportThe Cascade hardware architecture for high/variable precision arithmetic is describ...
AbstractThis paper discusses the relationship between computer arithmetic and hardware implementatio...
Graduation date: 2001The arithmetic portions of almost all modern processor architectures are of ver...
AbstractAdvances in computer technology are now so profound that the arithmetic capability and reper...
Binary multiplication continues to be one of the essential arithmetic operations in digital circuits...
Many algorithms feature an iterative loop that converges to the result of interest. The numerical op...
Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when...
This work presents an approach for accelerating arbitrary-precision arithmetic on high-performance r...
This work presents an approach for accelerating arbitrary-precision arithmetic on high-performance r...
Nowadays, computers offer more and more arithmetic functions wired in hardware. Last generations of ...
In this dissertation, we address the design of multi-functional arithmetic units working with the mo...
The continuing demand for technological advances while dealing with mutual constraining characterist...
This paper addresses the potential speedup achieved by using decimal floating-point hardware, instea...
Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...
technical reportThe Cascade hardware architecture for high/variable precision arithmetic is describ...
AbstractThis paper discusses the relationship between computer arithmetic and hardware implementatio...
Graduation date: 2001The arithmetic portions of almost all modern processor architectures are of ver...
AbstractAdvances in computer technology are now so profound that the arithmetic capability and reper...
Binary multiplication continues to be one of the essential arithmetic operations in digital circuits...
Many algorithms feature an iterative loop that converges to the result of interest. The numerical op...
Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when...
This work presents an approach for accelerating arbitrary-precision arithmetic on high-performance r...
This work presents an approach for accelerating arbitrary-precision arithmetic on high-performance r...
Nowadays, computers offer more and more arithmetic functions wired in hardware. Last generations of ...
In this dissertation, we address the design of multi-functional arithmetic units working with the mo...
The continuing demand for technological advances while dealing with mutual constraining characterist...
This paper addresses the potential speedup achieved by using decimal floating-point hardware, instea...
Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...