International audience[Függer et al., IEEE TC 2016] proved that no existing digital circuit model, including those based on pure and inertial delay channels, faithfully captures glitch propagation: For the Short-Pulse Filtration (SPF) problem similar to that of building a one-shot inertial delay, they showed that every member of the broad class of bounded single-history channels either contradicts the unsolvability of SPF in bounded time or the solvability of SPF in unbounded time in physical circuits. In this paper, we propose binary circuit models based on novel involution channels that do not suffer from this deficiency. Namely, in sharp contrast to bounded single-history channels, SPF cannot be solved in bounded time with involution cha...
Transient simulation of a gate circuit is an ecient method of counting signal changes occurring duri...
Although the theory of asynchronous circuits (fates back to the early 1950s, considerable progress h...
International audienceDelay estimation is a crucial task in digital circuit design as it provides th...
International audience[Függer et al., IEEE TC 2016] proved that no existing digital circuit model, i...
Modern digital circuit design relies on fast digital timing simulation tools and, hence, on accurate...
International audienceIn contrast to analog models, binary circuit models are high-level abstraction...
International audienceWe show that no existing continuous-time, binary value-domain model for digita...
International audienceFast digital timing simulations based on continuous-time, digital-value circui...
International audienceAccurate delay models are important for static and dynamic timing analysis of ...
The authors present the Inertial and Degradation Delay Model (IDDM) for CMOS digital simulation. Th...
We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. ...
Pulse gates have shown promise as a structured manual methodology for the design of high performance...
Timing verification of digital CMOS circuits is a key point in the design process. In this contribu...
International audienceWe introduce the prototype of a digital timing simulation and power analysis t...
Accurately modeling the delay of multi-input gates is challenging due to variations caused by switch...
Transient simulation of a gate circuit is an ecient method of counting signal changes occurring duri...
Although the theory of asynchronous circuits (fates back to the early 1950s, considerable progress h...
International audienceDelay estimation is a crucial task in digital circuit design as it provides th...
International audience[Függer et al., IEEE TC 2016] proved that no existing digital circuit model, i...
Modern digital circuit design relies on fast digital timing simulation tools and, hence, on accurate...
International audienceIn contrast to analog models, binary circuit models are high-level abstraction...
International audienceWe show that no existing continuous-time, binary value-domain model for digita...
International audienceFast digital timing simulations based on continuous-time, digital-value circui...
International audienceAccurate delay models are important for static and dynamic timing analysis of ...
The authors present the Inertial and Degradation Delay Model (IDDM) for CMOS digital simulation. Th...
We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. ...
Pulse gates have shown promise as a structured manual methodology for the design of high performance...
Timing verification of digital CMOS circuits is a key point in the design process. In this contribu...
International audienceWe introduce the prototype of a digital timing simulation and power analysis t...
Accurately modeling the delay of multi-input gates is challenging due to variations caused by switch...
Transient simulation of a gate circuit is an ecient method of counting signal changes occurring duri...
Although the theory of asynchronous circuits (fates back to the early 1950s, considerable progress h...
International audienceDelay estimation is a crucial task in digital circuit design as it provides th...