The test pattern generator produces test vectors that are applied to the tested circuit during pseudo-random testing of combinational circuits. The nature of the generator thus directly influences the fault coverage achieved. In this paper we discuss the influence of the type of pseudo-random pattern generator on stuck-at fault coverage. Linear feedback shift registers (LFSRs) are mostly used as test pattern generators, and the generating polynomial is primitive to ensure the maximum period. We have shown that it is not necessary to use primitive polynomials, and moreover that their using is even undesirable in most cases. This fact is documented by statistical graphs. The necessity of the proper choice of a generating polynomial and an LFS...
A linear feedback shift register (LFSR) has been frequently used in the Built-in Self-Test (BIST) de...
The suggested hybrid plan efficiently combines test compression with LBIST, where both techniques co...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
The test pattern generator produces test vectors that are applied to the tested circuit during pseud...
The test pattern generator produces test vectors that are applied to the tested circuit during pseu...
Abstract. The paper presents a design method for Built-In Self Test (BIST) that uses a cellular auto...
[[abstract]]During built-in self-test (BIST), the set of patterns generated by a pseudo-random patte...
[[abstract]]During built-in self-test (BIST), the set of patterns generated by a pseudo-random patte...
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be us...
This paper presents a new algorithm for the automated synthesis of pseudo-random test patterns gener...
International audienceThe combination of higher quality requirements and sensitivity of high perform...
A new testing paradigm called Built-In Self-Test (BIST) has been gaining increasing acceptance over ...
This paper proposes low power pseudo random Test Pattern generation .This test pattern is run on the...
Particularly, several hybrid BIST schemes store deterministic top-up patterns around the tester insi...
Pseudo Random Number Generators are widely used in VLSI Design as Test Pattern Generators for testin...
A linear feedback shift register (LFSR) has been frequently used in the Built-in Self-Test (BIST) de...
The suggested hybrid plan efficiently combines test compression with LBIST, where both techniques co...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
The test pattern generator produces test vectors that are applied to the tested circuit during pseud...
The test pattern generator produces test vectors that are applied to the tested circuit during pseu...
Abstract. The paper presents a design method for Built-In Self Test (BIST) that uses a cellular auto...
[[abstract]]During built-in self-test (BIST), the set of patterns generated by a pseudo-random patte...
[[abstract]]During built-in self-test (BIST), the set of patterns generated by a pseudo-random patte...
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be us...
This paper presents a new algorithm for the automated synthesis of pseudo-random test patterns gener...
International audienceThe combination of higher quality requirements and sensitivity of high perform...
A new testing paradigm called Built-In Self-Test (BIST) has been gaining increasing acceptance over ...
This paper proposes low power pseudo random Test Pattern generation .This test pattern is run on the...
Particularly, several hybrid BIST schemes store deterministic top-up patterns around the tester insi...
Pseudo Random Number Generators are widely used in VLSI Design as Test Pattern Generators for testin...
A linear feedback shift register (LFSR) has been frequently used in the Built-in Self-Test (BIST) de...
The suggested hybrid plan efficiently combines test compression with LBIST, where both techniques co...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...