In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- mulated as a constrained combinatorial optimization problem and solved using an tabu search algorithm. Only gates on the critical sensitizable paths are consid- ered for optimization. Such a strategy leads to sizable circuit speed improvement with minimum increase in the overall circuit capacitance. Compared to earlier approaches, the presented technique produces circuits with remarkable increase in speed (greater than 20%) for very small increase in overall circuit capacitance (less than 3%). Keywords: Tabu Search, Circuit Optimization, Search Algorithms, CMOS/BiCMOS, Mixed Technologies, Critical Path, False Path
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
This thesis is concerned with optimising BiCMOS circuits. A numerical optimiser finds the set of arg...
This paper presents a method for optimizing BiCMOS logic networks that exploits the fact that such n...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- m...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- m...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- m...
Abstract In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem,...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is formul...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is formul...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is formul...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem, formulat...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
This thesis is concerned with optimising BiCMOS circuits. A numerical optimiser finds the set of arg...
This paper presents a method for optimizing BiCMOS logic networks that exploits the fact that such n...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- m...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- m...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is for- m...
Abstract In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem,...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is formul...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is formul...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem is formul...
In this paper we address the problem of optimizing mixed CMOS/BiCMOS circuits. The problem, formulat...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
The problem of optimising mixed CMOS/BiCMOS circuits is solved using a tabu search. Only gates on cr...
This thesis is concerned with optimising BiCMOS circuits. A numerical optimiser finds the set of arg...
This paper presents a method for optimizing BiCMOS logic networks that exploits the fact that such n...