Abstract Carbon Nanotube filed-effect transistor (CNFET) is one of the promising alternatives to the MOS transistors. The geometry-dependent threshold voltage is one of the CNFET characteristics, which is used in the proposed Full Adder cell. In this paper, we present a high speed Full Adder cell using CNFETs based on majority-not (Minority) function. Presented design uses eight transistors and eight capacitors. Simulation results show significant improvement in terms of delay and power-delay product in comparison to contemporary CNFET Adder Cells. Simulations were carried out using HSPICE based on CNFET model with 0.6 V VDD.</p
Adders are constituted as the fundamental blocks of arithmetic circuits and are considered important...
CMOS transistors are most widely used for the design of computerized circuits, when scaling down the...
Nowadays, energy consumption is the main concern in portable electronic systems such as laptops, sma...
In this paper, a low-power high-speed hybrid full adder cell is proposed, which is implemented based...
The full adder circuit is one of the most significant and prominent fundamental parts in digital pro...
Presenting a novel full adder cell will be increases all the arithmetic logic unit performance. In t...
The adder circuit is basic component of arithmetic logic design and that is the most important block...
This paper presents two novel full adder cells based on Carbon Nanotube Field Effect Transistor (CNT...
The full adder is a key component for many digital circuits like microprocessors or digital signal p...
In this article, a low-power and energy-efficient hybrid full adder circuit is proposed, which is im...
High speed Full-Adder (FA) module is a critical element in designing high performance arithmetic cir...
In this paper two novel high performance designs for AND and OR basic gates and a novel Full-Adder C...
A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the ...
Full Adder is the basic element for arithmetic operations used in Very Large Scale Integrated (VLSI)...
A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the ...
Adders are constituted as the fundamental blocks of arithmetic circuits and are considered important...
CMOS transistors are most widely used for the design of computerized circuits, when scaling down the...
Nowadays, energy consumption is the main concern in portable electronic systems such as laptops, sma...
In this paper, a low-power high-speed hybrid full adder cell is proposed, which is implemented based...
The full adder circuit is one of the most significant and prominent fundamental parts in digital pro...
Presenting a novel full adder cell will be increases all the arithmetic logic unit performance. In t...
The adder circuit is basic component of arithmetic logic design and that is the most important block...
This paper presents two novel full adder cells based on Carbon Nanotube Field Effect Transistor (CNT...
The full adder is a key component for many digital circuits like microprocessors or digital signal p...
In this article, a low-power and energy-efficient hybrid full adder circuit is proposed, which is im...
High speed Full-Adder (FA) module is a critical element in designing high performance arithmetic cir...
In this paper two novel high performance designs for AND and OR basic gates and a novel Full-Adder C...
A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the ...
Full Adder is the basic element for arithmetic operations used in Very Large Scale Integrated (VLSI)...
A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the ...
Adders are constituted as the fundamental blocks of arithmetic circuits and are considered important...
CMOS transistors are most widely used for the design of computerized circuits, when scaling down the...
Nowadays, energy consumption is the main concern in portable electronic systems such as laptops, sma...