Recently, the complexity of safety-critical cyber-physical systems has spiked due to an increasing demand for performance, impacting both software and hardware layers. The timing behavior of complex systems, however, is harder to analyze. Real-time hardware resource management aims at mitigating this problem, but the proposed solutions often involve OS-level modifications. In this sense, software verification is key to build trust and allow such techniques to be broadly adopted. This paper specifically focuses on CPU cache management, demonstrating that OS-level hardware management logic can be verified at the source code level in a modular way, ie, without verifying the entire OS.https://ospert19.tudos.org/ospert19-proceedings.pdfAccepted ...
Formal verification is proposed to ensure the correctness of the design and make functional verifica...
This paper describes our experience applyingformal verification to the cache coherence protocol of t...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
The verification and validation requirements set on high-integrity real-time systems demand the prov...
This paper demonstrates the intractability of achieving statically predictable performance behavior ...
This paper demonstrates the intractability of achieving statically predictable performance behavior ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
We describe the formal verification of a hardware subsystem consisting of a memory management unit a...
Operating system (OS) kernels achieve isolation between user-level processes using multi-level page ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
International audienceIn this paper we present a hardware based solution to verify simultaneously Co...
Abstract—Real-time operating systems have been around for some time, but they are never designed for...
Abstract—Many modern multi-core processors sport a large shared cache with the primary goal of enhan...
The role of the operating system (OS) in managing shared resources such as CPU time, memory, periphe...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...
Formal verification is proposed to ensure the correctness of the design and make functional verifica...
This paper describes our experience applyingformal verification to the cache coherence protocol of t...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
The verification and validation requirements set on high-integrity real-time systems demand the prov...
This paper demonstrates the intractability of achieving statically predictable performance behavior ...
This paper demonstrates the intractability of achieving statically predictable performance behavior ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
We describe the formal verification of a hardware subsystem consisting of a memory management unit a...
Operating system (OS) kernels achieve isolation between user-level processes using multi-level page ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
International audienceIn this paper we present a hardware based solution to verify simultaneously Co...
Abstract—Real-time operating systems have been around for some time, but they are never designed for...
Abstract—Many modern multi-core processors sport a large shared cache with the primary goal of enhan...
The role of the operating system (OS) in managing shared resources such as CPU time, memory, periphe...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...
Formal verification is proposed to ensure the correctness of the design and make functional verifica...
This paper describes our experience applyingformal verification to the cache coherence protocol of t...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...