Interconnection of Clusters of Various Architectures in Grid Systems

The future of computing seems to be parallel. The computers built with general purpose processors are superseded nowadays by systems built around processors with multiple cores that are designed to operate with massive amount of arithmetic operation. And more frequently these processors are able to implement an internal parallelism. A similar step was made by IBM when they proposed that a unit dedicated to arithmetical operations to be used as an accelerator node for a cluster controlled by nodes with general purpose architecture. A new approach has been made towards high performance computing (HPC), in the form of hybrid architectures. However, using machines with different architecture as a single system can pose problems in application deployment. The paper analyse these difficulties and proposes a procedure to implement a multi-level parallelism at the application level. The experimental results are discusse